[llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)
Jeffrey Byrnes via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 23 17:06:31 PDT 2025
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@@ -0,0 +1,466 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a < %s | FileCheck %s --check-prefixes=GFX90A
+
+define void @loads_align4(i32 %arg) {
+ ; Scalars
+; GFX90A-LABEL: 'loads_align4'
+; GFX90A-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = load i8, ptr poison, align 4
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jrbyrnes wrote:
Can you add tests for different types too (e.g. i1 and i16) and different addressspaces.
https://github.com/llvm/llvm-project/pull/134934
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