[llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 24 14:04:55 PDT 2025
================
@@ -24,6 +34,69 @@
namespace llvm {
+/// A MachineSchedStrategy implementation for SystemZ pre RA scheduling.
+class SystemZPreRASchedStrategy : public GenericScheduler {
+ // The FP/Vector registers are prioritized during scheduling.
+ std::set<unsigned> PrioRegClasses;
+ void initializePrioRegClasses(const TargetRegisterInfo *TRI);
+ bool isPrioVirtReg(Register Reg, const MachineRegisterInfo *MRI) const {
+ return (Reg.isVirtual() &&
+ PrioRegClasses.count(MRI->getRegClass(Reg)->getID()));
+ }
+
+ // A TinyRegion has up to 10 instructions and is scheduled differently.
+ bool TinyRegion;
+
+ // Num instructions left to schedule.
+ unsigned NumLeft;
+
+ // Tru if latency scheduling is enabled.
+ bool ShouldReduceLatency;
+
+ // Keep track of currently live registers.
+ struct VRegSet : std::set<Register> {
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JonPsson1 wrote:
ok changed from is-a to has-a, a bit more methods to implement but at least useful for adding assertions.
https://github.com/llvm/llvm-project/pull/135076
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