[llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)

Harrison Hao via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 25 02:18:24 PDT 2025


================
@@ -423,7 +450,41 @@ void GCNHazardRecognizer::AdvanceCycle() {
 }
 
 void GCNHazardRecognizer::RecedeCycle() {
-  llvm_unreachable("hazard recognizer does not support bottom-up scheduling.");
+  // If no instruction was issued this cycle, pop the oldest placeholder.
+  if (!CurrCycleInstr) {
+    if (!EmittedInstrs.empty())
+      EmittedInstrs.pop_back();
+    return;
+  }
+
+  // If this is a bundle header, handle the entire bundle here.
+  if (CurrCycleInstr->isBundle()) {
+    processBundleBottomUp();
+    return;
+  }
+
+  unsigned NumWaitStates = TII.getNumWaitStates(*CurrCycleInstr);
+  if (!NumWaitStates) {
+    CurrCycleInstr = nullptr;
+    return;
+  }
+
+  // Add current instruction to the emitted list.
+  EmittedInstrs.push_back(CurrCycleInstr);
+
+  // Model remaining wait states by removing older placeholders.
+  for (unsigned I = 1, E = std::min(NumWaitStates, getMaxLookAhead()); I < E;
+       ++I) {
+    if (!EmittedInstrs.empty())
+      EmittedInstrs.pop_back();
+  }
----------------
harrisonGPU wrote:

Hi @arsenm , When I run the following test:
```
; RUN: llc -march=amdgcn -mcpu=gfx1100 -debug-only=post-RA-sched -verify-machineinstrs < %s 2>&1 | FileCheck %s

define amdgpu_kernel void @hazard_test() {
entry:
  call void @llvm.amdgcn.s.nop(i16 5)
  call void @llvm.amdgcn.s.nop(i16 0)
  ret void
}

declare void @llvm.amdgcn.s.nop(i16)
```
It should trigger the maximum lookahead behavior. However, I don't see any log output related to maximum lookahead when using either `-misched-postra-direction=topdown` or `-misched-postra-direction=bottomup`.

Could you please give me some suggestions on how to add this test?

https://github.com/llvm/llvm-project/pull/135295


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