[llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-dev-x86-64` running on `ml-opt-dev-x86-64-b1` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/137/builds/17265

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/sdag-print-divergence.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/b/ml-opt-dev-x86-64-b1/build/bin/llc -mtriple=amdgcn -mcpu=gfx900 -O0 -verify-machineinstrs < /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll -debug-only=isel 2>&1 | /b/ml-opt-dev-x86-64-b1/build/bin/FileCheck --check-prefixes=GCN,GCN-DEFAULT /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll # RUN: at line 2
+ /b/ml-opt-dev-x86-64-b1/build/bin/FileCheck --check-prefixes=GCN,GCN-DEFAULT /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
+ /b/ml-opt-dev-x86-64-b1/build/bin/llc -mtriple=amdgcn -mcpu=gfx900 -O0 -verify-machineinstrs -debug-only=isel
/b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll:13:16: error: GCN-DEFAULT: expected string not found in input
; GCN-DEFAULT: t7: i32 = TargetConstant<3222>
               ^
<stdin>:11:46: note: scanning from here
 t2: f32,ch = CopyFromReg t0, Register:f32 %0
                                             ^
<stdin>:12:2: note: possible intended match here
 t7: i32 = TargetConstant<3228>
 ^

Input file: <stdin>
Check file: /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
            6: Enabling fast-isel 
            7:  
            8: Initial selection DAG: %bb.0 'test_sdag_dump:entry' 
            9: SelectionDAG has 11 nodes: 
           10:  t0: ch,glue = EntryToken 
           11:  t2: f32,ch = CopyFromReg t0, Register:f32 %0 
check:13'0                                                  X error: no match found
           12:  t7: i32 = TargetConstant<3228> 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:13'1      ?                               possible intended match
           13:  t5: f32 = fadd t2, t2 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~
           14:  t4: f32,ch = CopyFromReg # D:1 t0, Register:f32 %1 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           15:  t6: f32 = fadd # D:1 t5, t4 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           16:  t9: ch,glue = CopyToReg # D:1 t0, Register:f32 $vgpr0, t6 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           17:  t10: ch = RETURN_TO_EPILOG t9, Register:f32 $vgpr0, t9:1 
check:13'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
...

```

</details>

https://github.com/llvm/llvm-project/pull/135326