[llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)
Jeffrey Byrnes via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 21 17:12:42 PDT 2025
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@@ -344,9 +344,10 @@ unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const {
unsigned GCNTTIImpl::getMaximumVF(unsigned ElemWidth, unsigned Opcode) const {
if (Opcode == Instruction::Load || Opcode == Instruction::Store)
return 32 * 4 / ElemWidth;
- return (ElemWidth == 16 && ST->has16BitInsts()) ? 2
- : (ElemWidth == 32 && ST->hasPackedFP32Ops()) ? 2
- : 1;
+ return ElemWidth == 8 ? 4
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jrbyrnes wrote:
Do all the TTI->get*Cost queries handled i8/vector i8 types?
https://github.com/llvm/llvm-project/pull/134934
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