[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)

Alex MacLean via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 22 15:24:02 PDT 2025


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@@ -464,10 +464,14 @@ bool NVPTXDAGToDAGISel::tryUNPACK_VECTOR(SDNode *N) {
 bool NVPTXDAGToDAGISel::tryEXTRACT_VECTOR_ELEMENT(SDNode *N) {
   SDValue Vector = N->getOperand(0);
 
-  // We only care about 16x2 as it's the only real vector type we
-  // need to deal with.
+  // We only care about packed vector types: 16x2 and 32x2.
   MVT VT = Vector.getSimpleValueType();
-  if (!Isv2x16VT(VT))
+  unsigned NewOpcode = 0;
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AlexMaclean wrote:

Can the `= 0` be removed here?

https://github.com/llvm/llvm-project/pull/126337


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