[llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)

[Craig Topper via llvm-commits]

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/136762

>From 450b0caafd9a04542d82ba4ce5a7d4e37d0055ee Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 22 Apr 2025 13:29:35 -0700
Subject: [PATCH 1/2] [RISCV] Clear kill flags after replaceRegWith in
 RISCVFoldMemOffset.

---
 llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp |  1 +
 llvm/test/CodeGen/RISCV/fold-mem-offset.mir  | 43 ++++++++++++++++++++
 2 files changed, 44 insertions(+)
 create mode 100644 llvm/test/CodeGen/RISCV/fold-mem-offset.mir

diff --git a/llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp b/llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
index 989e9d859d64f..aa8da1486faca 100644
--- a/llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
@@ -274,6 +274,7 @@ bool RISCVFoldMemOffset::runOnMachineFunction(MachineFunction &MF) {
         MemMI->getOperand(2).setImm(NewOffset);
 
       MRI.replaceRegWith(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
+      MRI.clearKillFlags(MI.getOperand(1).getReg());
       MI.eraseFromParent();
     }
   }
diff --git a/llvm/test/CodeGen/RISCV/fold-mem-offset.mir b/llvm/test/CodeGen/RISCV/fold-mem-offset.mir
new file mode 100644
index 0000000000000..17cec6e6f8b9c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/fold-mem-offset.mir
@@ -0,0 +1,43 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc %s -mtriple=riscv32 -run-pass=riscv-fold-mem-offset -verify-machineinstrs | FileCheck %s
+
+---
+name:            crash
+tracksRegLiveness: true
+noPhis:          false
+isSSA:           true
+noVRegs:         false
+hasFakeUses:     false
+body:             |
+  bb.0:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: crash
+    ; CHECK: liveins: $x10, $x11
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x11
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x10
+    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 3
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:gpr = ADD killed [[SLLI]], [[COPY1]]
+    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 23
+    ; CHECK-NEXT: [[ADD1:%[0-9]+]]:gpr = ADD [[ADD]], [[LUI]]
+    ; CHECK-NEXT: [[ADD2:%[0-9]+]]:gpr = ADD [[ADD]], [[LUI]]
+    ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW killed [[ADD2]], 1792
+    ; CHECK-NEXT: [[LW1:%[0-9]+]]:gpr = LW killed [[ADD1]], 1796
+    ; CHECK-NEXT: $x10 = COPY [[LW]]
+    ; CHECK-NEXT: $x11 = COPY [[LW1]]
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+    %1:gpr = COPY $x11
+    %0:gpr = COPY $x10
+    %3:gpr = SLLI %1, 3
+    %4:gpr = ADD killed %3, %0
+    %5:gpr = LUI 23
+    %6:gpr = ADDI %5, 1792
+    %7:gpr = ADD %4, killed %6
+    %8:gpr = ADD %4, %5
+    %9:gpr = LW killed %8, 1792
+    %10:gpr = LW killed %7, 4
+    $x10 = COPY %9
+    $x11 = COPY %10
+    PseudoRET implicit $x10, implicit $x11
+...

>From 9ec0291d0abf4f18f54e742af1e52f0fa378c88d Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 22 Apr 2025 17:57:04 -0700
Subject: [PATCH 2/2] fixup! Add -o - to test.

---
 llvm/test/CodeGen/RISCV/fold-mem-offset.mir | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/test/CodeGen/RISCV/fold-mem-offset.mir b/llvm/test/CodeGen/RISCV/fold-mem-offset.mir
index 17cec6e6f8b9c..41afa26e70641 100644
--- a/llvm/test/CodeGen/RISCV/fold-mem-offset.mir
+++ b/llvm/test/CodeGen/RISCV/fold-mem-offset.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc %s -mtriple=riscv32 -run-pass=riscv-fold-mem-offset -verify-machineinstrs | FileCheck %s
+# RUN: llc %s -mtriple=riscv32 -run-pass=riscv-fold-mem-offset -verify-machineinstrs -o - | FileCheck %s
 
 ---
 name:            crash