[llvm] [TTI] Make all interface methods const (PR #136598)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 21 12:12:52 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
@llvm/pr-subscribers-backend-amdgpu
Author: Sergei Barannikov (s-barannikov)
<details>
<summary>Changes</summary>
Making `TargetTransformInfo::Model::Impl` `const` makes sure all interface methods are `const`, in `BasicTTIImpl`, its bases, and in all derived classes.
---
Patch is 136.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/136598.diff
34 Files Affected:
- (modified) llvm/include/llvm/Analysis/TargetTransformInfo.h (+1-1)
- (modified) llvm/include/llvm/Analysis/TargetTransformInfoImpl.h (+12-12)
- (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+41-42)
- (modified) llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (+32-29)
- (modified) llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (+33-31)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (+7-7)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (+6-6)
- (modified) llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp (+5-5)
- (modified) llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h (+3-3)
- (modified) llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (+14-13)
- (modified) llvm/lib/Target/ARM/ARMTargetTransformInfo.h (+20-21)
- (modified) llvm/lib/Target/BPF/BPFTargetTransformInfo.h (+2-1)
- (modified) llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp (+3-3)
- (modified) llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h (+3-2)
- (modified) llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (+10-10)
- (modified) llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (+13-17)
- (modified) llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h (+5-4)
- (modified) llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp (+2-2)
- (modified) llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h (+2-2)
- (modified) llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp (+2-2)
- (modified) llvm/lib/Target/Mips/MipsTargetTransformInfo.h (+2-2)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp (+6-6)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h (+6-6)
- (modified) llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (+23-25)
- (modified) llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (+18-19)
- (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (+16-15)
- (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h (+21-21)
- (modified) llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h (+1-1)
- (modified) llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (+15-13)
- (modified) llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (+13-13)
- (modified) llvm/lib/Target/VE/VETargetTransformInfo.h (+4-4)
- (modified) llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h (+1-1)
- (modified) llvm/lib/Target/X86/X86TargetTransformInfo.cpp (+33-35)
- (modified) llvm/lib/Target/X86/X86TargetTransformInfo.h (+20-20)
``````````diff
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 2efca0d1d754f..b5d766c34d09d 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -2367,7 +2367,7 @@ class TargetTransformInfo::Concept {
template <typename T>
class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
- T Impl;
+ const T Impl;
public:
Model(T Impl) : Impl(std::move(Impl)) {}
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index ea481baddc5c3..35c108754c5ac 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -341,7 +341,7 @@ class TargetTransformInfoImplBase {
}
bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor,
- Align Alignment, unsigned AddrSpace) {
+ Align Alignment, unsigned AddrSpace) const {
return false;
}
@@ -440,7 +440,7 @@ class TargetTransformInfoImplBase {
bool enableSelectOptimize() const { return true; }
- bool shouldTreatInstructionLikeSelect(const Instruction *I) {
+ bool shouldTreatInstructionLikeSelect(const Instruction *I) const {
// A select with two constant operands will usually be better left as a
// select.
using namespace llvm::PatternMatch;
@@ -747,7 +747,7 @@ class TargetTransformInfoImplBase {
unsigned getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
const APInt &DemandedDstElts,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
return 1;
}
@@ -1250,7 +1250,7 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
const Value *Base,
const TTI::PointersChainInfo &Info,
Type *AccessTy,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
InstructionCost Cost = TTI::TCC_Free;
// In the basic model we take into account GEP instructions only
// (although here can come alloca instruction, a value, constants and/or
@@ -1269,15 +1269,15 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
if (Info.isSameBase() && V != Base) {
if (GEP->hasAllConstantIndices())
continue;
- Cost += static_cast<T *>(this)->getArithmeticInstrCost(
+ Cost += static_cast<const T *>(this)->getArithmeticInstrCost(
Instruction::Add, GEP->getType(), CostKind,
{TTI::OK_AnyValue, TTI::OP_None}, {TTI::OK_AnyValue, TTI::OP_None},
{});
} else {
SmallVector<const Value *> Indices(GEP->indices());
- Cost += static_cast<T *>(this)->getGEPCost(GEP->getSourceElementType(),
- GEP->getPointerOperand(),
- Indices, AccessTy, CostKind);
+ Cost += static_cast<const T *>(this)->getGEPCost(
+ GEP->getSourceElementType(), GEP->getPointerOperand(), Indices,
+ AccessTy, CostKind);
}
}
return Cost;
@@ -1285,10 +1285,10 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
InstructionCost getInstructionCost(const User *U,
ArrayRef<const Value *> Operands,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
using namespace llvm::PatternMatch;
- auto *TargetTTI = static_cast<T *>(this);
+ auto *TargetTTI = static_cast<const T *>(this);
// Handle non-intrinsic calls, invokes, and callbr.
// FIXME: Unlikely to be true for anything but CodeSize.
auto *CB = dyn_cast<CallBase>(U);
@@ -1585,8 +1585,8 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
return CostKind == TTI::TCK_RecipThroughput ? -1 : TTI::TCC_Basic;
}
- bool isExpensiveToSpeculativelyExecute(const Instruction *I) {
- auto *TargetTTI = static_cast<T *>(this);
+ bool isExpensiveToSpeculativelyExecute(const Instruction *I) const {
+ auto *TargetTTI = static_cast<const T *>(this);
SmallVector<const Value *, 4> Ops(I->operand_values());
InstructionCost Cost = TargetTTI->getInstructionCost(
I, Ops, TargetTransformInfo::TCK_SizeAndLatency);
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index b42223eda9922..ca32d36297beb 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -379,11 +379,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return (CallerBits & CalleeBits) == CalleeBits;
}
- bool hasBranchDivergence(const Function *F = nullptr) { return false; }
+ bool hasBranchDivergence(const Function *F = nullptr) const { return false; }
- bool isSourceOfDivergence(const Value *V) { return false; }
+ bool isSourceOfDivergence(const Value *V) const { return false; }
- bool isAlwaysUniform(const Value *V) { return false; }
+ bool isAlwaysUniform(const Value *V) const { return false; }
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
return false;
@@ -393,7 +393,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return true;
}
- unsigned getFlatAddressSpace() {
+ unsigned getFlatAddressSpace() const {
// Return an invalid address space.
return -1;
}
@@ -426,22 +426,22 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return nullptr;
}
- bool isLegalAddImmediate(int64_t imm) {
+ bool isLegalAddImmediate(int64_t imm) const {
return getTLI()->isLegalAddImmediate(imm);
}
- bool isLegalAddScalableImmediate(int64_t Imm) {
+ bool isLegalAddScalableImmediate(int64_t Imm) const {
return getTLI()->isLegalAddScalableImmediate(Imm);
}
- bool isLegalICmpImmediate(int64_t imm) {
+ bool isLegalICmpImmediate(int64_t imm) const {
return getTLI()->isLegalICmpImmediate(imm);
}
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
Instruction *I = nullptr,
- int64_t ScalableOffset = 0) {
+ int64_t ScalableOffset = 0) const {
TargetLoweringBase::AddrMode AM;
AM.BaseGV = BaseGV;
AM.BaseOffs = BaseOffset;
@@ -487,11 +487,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
}
- bool isLSRCostLess(TTI::LSRCost C1, TTI::LSRCost C2) {
+ bool isLSRCostLess(TTI::LSRCost C1, TTI::LSRCost C2) const {
return TargetTransformInfoImplBase::isLSRCostLess(C1, C2);
}
- bool isNumRegsMajorCostOfLSR() {
+ bool isNumRegsMajorCostOfLSR() const {
return TargetTransformInfoImplBase::isNumRegsMajorCostOfLSR();
}
@@ -499,13 +499,14 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return TargetTransformInfoImplBase::shouldDropLSRSolutionIfLessProfitable();
}
- bool isProfitableLSRChainElement(Instruction *I) {
+ bool isProfitableLSRChainElement(Instruction *I) const {
return TargetTransformInfoImplBase::isProfitableLSRChainElement(I);
}
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
StackOffset BaseOffset, bool HasBaseReg,
- int64_t Scale, unsigned AddrSpace) {
+ int64_t Scale,
+ unsigned AddrSpace) const {
TargetLoweringBase::AddrMode AM;
AM.BaseGV = BaseGV;
AM.BaseOffs = BaseOffset.getFixed();
@@ -517,11 +518,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return InstructionCost::getInvalid();
}
- bool isTruncateFree(Type *Ty1, Type *Ty2) {
+ bool isTruncateFree(Type *Ty1, Type *Ty2) const {
return getTLI()->isTruncateFree(Ty1, Ty2);
}
- bool isProfitableToHoist(Instruction *I) {
+ bool isProfitableToHoist(Instruction *I) const {
return getTLI()->isProfitableToHoist(I);
}
@@ -539,14 +540,14 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
}
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JumpTableSize,
ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) {
+ BlockFrequencyInfo *BFI) const {
/// Try to find the estimated number of clusters. Note that the number of
/// clusters identified in this function could be different from the actual
/// numbers found in lowering. This function ignore switches that are
@@ -602,7 +603,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return N;
}
- bool shouldBuildLookupTables() {
+ bool shouldBuildLookupTables() const {
const TargetLoweringBase *TLI = getTLI();
return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
@@ -633,18 +634,16 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return true;
}
- bool haveFastSqrt(Type *Ty) {
+ bool haveFastSqrt(Type *Ty) const {
const TargetLoweringBase *TLI = getTLI();
EVT VT = TLI->getValueType(DL, Ty);
return TLI->isTypeLegal(VT) &&
TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
}
- bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) {
- return true;
- }
+ bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { return true; }
- InstructionCost getFPOpCost(Type *Ty) {
+ InstructionCost getFPOpCost(Type *Ty) const {
// Check whether FADD is available, as a proxy for floating-point in
// general.
const TargetLoweringBase *TLI = getTLI();
@@ -674,7 +673,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
unsigned getInliningThresholdMultiplier() const { return 1; }
- unsigned adjustInliningThreshold(const CallBase *CB) { return 0; }
+ unsigned adjustInliningThreshold(const CallBase *CB) const { return 0; }
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const {
return 0;
}
@@ -683,7 +682,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
TTI::UnrollingPreferences &UP,
- OptimizationRemarkEmitter *ORE) {
+ OptimizationRemarkEmitter *ORE) const {
// This unrolling functionality is target independent, but to provide some
// motivation for its intended use, for x86:
@@ -754,7 +753,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
- TTI::PeelingPreferences &PP) {
+ TTI::PeelingPreferences &PP) const {
PP.PeelCount = 0;
PP.AllowPeeling = true;
PP.AllowLoopNestsPeeling = false;
@@ -762,34 +761,33 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
- AssumptionCache &AC,
- TargetLibraryInfo *LibInfo,
- HardwareLoopInfo &HWLoopInfo) {
+ AssumptionCache &AC, TargetLibraryInfo *LibInfo,
+ HardwareLoopInfo &HWLoopInfo) const {
return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
}
- unsigned getEpilogueVectorizationMinVF() {
+ unsigned getEpilogueVectorizationMinVF() const {
return BaseT::getEpilogueVectorizationMinVF();
}
- bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) {
+ bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const {
return BaseT::preferPredicateOverEpilogue(TFI);
}
TailFoldingStyle
- getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) {
+ getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) const {
return BaseT::getPreferredTailFoldingStyle(IVUpdateMayOverflow);
}
std::optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
- IntrinsicInst &II) {
+ IntrinsicInst &II) const {
return BaseT::instCombineIntrinsic(IC, II);
}
std::optional<Value *>
simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
APInt DemandedMask, KnownBits &Known,
- bool &KnownBitsComputed) {
+ bool &KnownBitsComputed) const {
return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
KnownBitsComputed);
}
@@ -798,7 +796,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
- SimplifyAndSetOp) {
+ SimplifyAndSetOp) const {
return BaseT::simplifyDemandedVectorEltsIntrinsic(
IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
SimplifyAndSetOp);
@@ -1015,7 +1013,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
}
- unsigned getMaxInterleaveFactor(ElementCount VF) { return 1; }
+ unsigned getMaxInterleaveFactor(ElementCount VF) const { return 1; }
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
@@ -1337,7 +1335,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
- VectorType *VecTy, unsigned Index) {
+ VectorType *VecTy,
+ unsigned Index) const {
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
CostKind, Index, nullptr, nullptr) +
@@ -1417,14 +1416,14 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstructionCost getVectorInstrCost(
unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
Value *Scalar,
- ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) {
+ ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) const {
return thisT()->getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr,
nullptr);
}
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
- unsigned Index) {
+ unsigned Index) const {
Value *Op0 = nullptr;
Value *Op1 = nullptr;
if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
@@ -1554,7 +1553,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstructionCost getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
- bool UseMaskForCond = false, bool UseMaskForGaps = false) {
+ bool UseMaskForCond = false, bool UseMaskForGaps = false) const {
// We cannot scalarize scalable vectors, so return Invalid.
if (isa<ScalableVectorType>(VecTy))
@@ -2886,7 +2885,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
}
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *,
- const SCEV *) {
+ const SCEV *) const {
return 0;
}
@@ -3067,7 +3066,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned,
Type *ResTy, VectorType *Ty,
std::optional<FastMathFlags> FMF,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
FTy && IsUnsigned && Opcode == Instruction::Add &&
FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
@@ -3095,7 +3094,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy,
VectorType *Ty,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
// Without any native support, this is equivalent to the cost of
// vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
// vecreduce.add(mul(A, B)).
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 51fa5237fcc50..720daa384968c 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -415,7 +415,7 @@ AArch64TTIImpl::getIntImmCost(const APInt &Imm, Type *Ty,
InstructionCost AArch64TTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx,
const APInt &Imm, Type *Ty,
TTI::TargetCostKind CostKind,
- Instruction *Inst) {
+ Instruction *Inst) const {
assert(Ty->isIntegerTy());
unsigned BitSize = Ty->getPrimitiveSizeInBits();
@@ -483,7 +483,7 @@ InstructionCost AArch64TTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx,
InstructionCost
AArch64TTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
const APInt &Imm, Type *Ty,
- TTI::TargetCostKind CostKind) {
+ TTI::TargetCostKind CostKind) const {
assert(Ty->isIntegerTy());
unsigned BitSize = Ty->getPrimitiveSizeInBits();
@@ -533,7 +533,7 @@ AArch64TTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
}
TargetTransformInfo::PopcntSupportKind
-AArch64TTIImpl::getPopcntSupport(unsigned TyWidth) {
+AArch64TTIImpl::getPopcntSupport(unsigned TyWidth) const {
assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
if (TyWidth == 32 || TyWidth == 64)
return TTI::PSK_FastHardware;
@@ -3560,7 +3560,7 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
InstructionCost AArch64TTIImpl::getExtractWithExtendCost(unsigned Opcode,
Type *Dst,
...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/136598
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