[clang] [llvm] [clang][AVR] Improve compatibility of inline assembly with avr-gcc (PR #136534)
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 21 00:33:12 PDT 2025
https://github.com/benshi001 updated https://github.com/llvm/llvm-project/pull/136534
>From 1dcd2d91c37a4e6afc137ff0ad54d25777a1f4b1 Mon Sep 17 00:00:00 2001
From: Ben Shi <bennshi at tencent.com>
Date: Mon, 21 Apr 2025 11:16:51 +0800
Subject: [PATCH 1/2] [clang][AVR] Improve compitability of inline assembly
with avr-gcc
Allow the value 64 to be round up to 0 for constraint 'I'.
---
clang/lib/Basic/Targets/AVR.h | 2 +-
clang/test/CodeGen/avr/avr-inline-asm-constraints.c | 2 ++
clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/clang/lib/Basic/Targets/AVR.h b/clang/lib/Basic/Targets/AVR.h
index 2117ab58e6f30..b2f2711c35435 100644
--- a/clang/lib/Basic/Targets/AVR.h
+++ b/clang/lib/Basic/Targets/AVR.h
@@ -124,7 +124,7 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
Info.setAllowsRegister();
return true;
case 'I': // 6-bit positive integer constant
- Info.setRequiresImmediate(0, 63);
+ Info.setRequiresImmediate(0, 64);
return true;
case 'J': // 6-bit negative integer constant
Info.setRequiresImmediate(-63, 0);
diff --git a/clang/test/CodeGen/avr/avr-inline-asm-constraints.c b/clang/test/CodeGen/avr/avr-inline-asm-constraints.c
index 3a956de8db48f..c8d83b4848312 100644
--- a/clang/test/CodeGen/avr/avr-inline-asm-constraints.c
+++ b/clang/test/CodeGen/avr/avr-inline-asm-constraints.c
@@ -71,6 +71,8 @@ void z() {
void I() {
// CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "I"(i16 50)
asm("subi r30, %0" :: "I"(50));
+ // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "I"(i16 64)
+ asm("subi r30, %0" :: "I"(64));
}
void J() {
diff --git a/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c b/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c
index 29f0b69285fa8..52b8d1cb044ca 100644
--- a/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c
+++ b/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c
@@ -6,4 +6,5 @@ int foo(void) {
__asm__ volatile("foo %0, 1" : : "fo" (val)); // expected-error {{invalid input constraint 'fo' in asm}}
__asm__ volatile("foo %0, 1" : : "Nd" (val)); // expected-error {{invalid input constraint 'Nd' in asm}}
__asm__ volatile("subi r30, %0" : : "G" (1)); // expected-error {{value '1' out of range for constraint 'G'}}
+ __asm__ volatile("out %0, r20" : : "I" (65)); // expected-error {{value '65' out of range for constraint 'I'}}
}
>From c8639a51d8a035644b72211e85f092e0eecd648e Mon Sep 17 00:00:00 2001
From: Ben Shi <bennshi at tencent.com>
Date: Mon, 21 Apr 2025 15:32:19 +0800
Subject: [PATCH 2/2] [AVR][NFC] Supplement a test for inline assembly
constraint 'I'
---
clang/lib/Basic/Targets/AVR.h | 2 ++
llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/clang/lib/Basic/Targets/AVR.h b/clang/lib/Basic/Targets/AVR.h
index b2f2711c35435..dfe64f8fae93f 100644
--- a/clang/lib/Basic/Targets/AVR.h
+++ b/clang/lib/Basic/Targets/AVR.h
@@ -124,6 +124,8 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
Info.setAllowsRegister();
return true;
case 'I': // 6-bit positive integer constant
+ // Due to issue https://github.com/llvm/llvm-project/issues/51513, we
+ // allow value 64 in the frontend and let it be dinied in the backend.
Info.setRequiresImmediate(0, 64);
return true;
case 'J': // 6-bit negative integer constant
diff --git a/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll b/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
index 416eb19c29db9..be54b4464f08c 100644
--- a/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
+++ b/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
@@ -21,3 +21,9 @@ define void @foo2() {
call void asm sideeffect "ldd r24, X+2", ""()
ret void
}
+
+define void @foo3() {
+ ; AVR6: error: value out of range for constraint 'I'
+ call void asm sideeffect "out $0, r20", "I"(i16 64)
+ ret void
+}
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