[llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)

Robert Imschweiler via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 24 07:02:18 PDT 2025


================
@@ -1424,9 +1424,9 @@ static bool shouldRunLdsBranchVmemWARHazardFixup(const MachineFunction &MF,
   bool HasVmem = false;
   for (auto &MBB : MF) {
     for (auto &MI : MBB) {
-      HasLds |= SIInstrInfo::isDS(MI);
-      HasVmem |=
-          SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI);
+      HasLds |= SIInstrInfo::isDS(MI) || SIInstrInfo::isLDSDMA(MI);
+      HasVmem |= (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isFLAT(MI)) &&
+                 !SIInstrInfo::isLDSDMA(MI);
----------------
ro-i wrote:

The pre-scan had been added to reduce compile time: https://reviews.llvm.org/D104219
> [...]
> This patch significantly improves compilation time in the cases the hazard
cannot happen. In one pathological case I looked at IsHazardInst is needlesly
called 88.6 milion times.
> [...]

https://github.com/llvm/llvm-project/pull/137170


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