[llvm] [LV] Add test for #87407 (PR #137005)

[Ramkumar Ramachandra via llvm-commits]

https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/137005

This bug is especially difficult to fix, since simplifyRecipes() simplifies the zext of 0 into the constant 0, removing an instruction and leaving a stale entry in the MinBWs map: a crash is subsequently observed in VPlanTransforms::truncateToMinimalBitwidths() due to a mismatch between the number of recipes processed and the number of entries in MinBWs. One possible way forward is to get simplifyRecipes() to erase entries from MinBWs when replacing Instructions with Constants.

Check in the test to ease investigation, while we plan a way to fix the bug.

>From a1c3462e30f14245439425b357704ff907749e9a Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: Wed, 23 Apr 2025 16:23:37 +0100
Subject: [PATCH] [LV] Add test for #87407

This bug is especially difficult to fix, since simplifyRecipes()
simplifies the zext of 0 into the constant 0, removing an instruction
and leaving a stale entry in the MinBWs map: a crash is subsequently
observed in VPlanTransforms::truncateToMinimalBitwidths() due to a
mismatch between the number of recipes processed and the number of
entries in MinBWs. One possible way forward is to get simplifyRecipes()
to erase entries from MinBWs when replacing Instructions with Constants.

Check in the test to ease investigation, while we plan a way to fix the
bug.
---
 llvm/test/Transforms/LoopVectorize/pr87407.ll | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 llvm/test/Transforms/LoopVectorize/pr87407.ll

diff --git a/llvm/test/Transforms/LoopVectorize/pr87407.ll b/llvm/test/Transforms/LoopVectorize/pr87407.ll
new file mode 100644
index 0000000000000..0983f2571e0b0
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/pr87407.ll
@@ -0,0 +1,24 @@
+; REQUIRES: asserts
+; RUN: not --crash opt -passes=loop-vectorize -disable-output %s
+
+define void @pr87407(ptr %dst, i64 %n) {
+entry:
+  %zext.0 = zext i8 0 to i64
+  br label %loop
+
+loop:
+  %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+  %max = tail call i64 @llvm.umax.i64(i64 %zext.0, i64 0)
+  %cmp.max.0 = icmp ne i64 %max, 0
+  %zext.cmp = zext i1 %cmp.max.0 to i64
+  %trunc = trunc i64 %zext.cmp to i32
+  %shl = shl i32 %trunc, 8
+  %res = trunc i32 %shl to i8
+  %iv.next = add i64 %iv, 1
+  %exit.cond = icmp ne i64 %iv.next, %n
+  br i1 %exit.cond, label %loop, label %exit
+
+exit:
+  store i8 %res, ptr %dst, align 1
+  ret void
+}