[llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)

[Luke Lau via llvm-commits]

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@@ -23839,6 +23926,21 @@ bool RISCVTargetLowering::lowerInterleavedIntrinsicToVPStore(
       Builder.CreateUDiv(WideEVL, ConstantInt::get(WideEVL->getType(), Factor)),
       XLenTy);
 
+  if (auto *FVTy = dyn_cast<FixedVectorType>(VTy)) {
+    static const Intrinsic::ID FixedMaskedVssegIntrIds[] = {
+        Intrinsic::riscv_seg2_store_mask, Intrinsic::riscv_seg3_store_mask,
+        Intrinsic::riscv_seg4_store_mask, Intrinsic::riscv_seg5_store_mask,
+        Intrinsic::riscv_seg6_store_mask, Intrinsic::riscv_seg7_store_mask,
+        Intrinsic::riscv_seg8_store_mask};
+
+    SmallVector<Value *, 8> Operands(InterleaveOperands.begin(),
+                                     InterleaveOperands.end());
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lukel97 wrote:

Does this work?
```suggestion
    SmallVector<Value *, 8> Operands(InterleaveOperands);
```

https://github.com/llvm/llvm-project/pull/135445