[llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)

[Florian Hahn via llvm-commits]

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@@ -906,7 +905,7 @@ AArch64LoadStoreOpt::mergeNarrowZeroStores(MachineBasicBlock::iterator I,
   DebugLoc DL = I->getDebugLoc();
   MachineBasicBlock *MBB = I->getParent();
   MachineInstrBuilder MIB;
-  MIB = BuildMI(*MBB, InsertionPoint, DL, TII->get(getMatchingWideOpcode(Opc)))
+  MIB = BuildMI(*MBB, InsertionPoint, DL, TII->get(NewOpcode))
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fhahn wrote:

this is unrelated?

https://github.com/llvm/llvm-project/pull/136705