[llvm] c39cc9f - [LV] Add tests for maximumnum/minimumnum reductions.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 25 07:07:42 PDT 2025
Author: Florian Hahn
Date: 2025-04-25T15:07:22+01:00
New Revision: c39cc9f48f323a61dd3f9ecc7332f0d2c7d4b8f0
URL: https://github.com/llvm/llvm-project/commit/c39cc9f48f323a61dd3f9ecc7332f0d2c7d4b8f0
DIFF: https://github.com/llvm/llvm-project/commit/c39cc9f48f323a61dd3f9ecc7332f0d2c7d4b8f0.diff
LOG: [LV] Add tests for maximumnum/minimumnum reductions.
Add reduction tests with maximumnum/minimumnum intrinsics.
Added:
llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll b/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
new file mode 100644
index 0000000000000..eb6dcc72df57e
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
@@ -0,0 +1,146 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -S %s | FileCheck %s
+; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -prefer-inloop-reductions -S %s | FileCheck %s
+
+define float @maximumnum_intrinsic(ptr readonly %x) {
+; CHECK-LABEL: define float @maximumnum_intrinsic(
+; CHECK-SAME: ptr readonly [[X:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, %[[ENTRY]] ], [ [[RED_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[X]], i32 [[IV]]
+; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP]], align 4
+; CHECK-NEXT: [[RED_NEXT]] = tail call float @llvm.maximumnum.f32(float [[RED]], float [[L]])
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[INC]], 1024
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi float [ [[RED_NEXT]], %[[LOOP]] ]
+; CHECK-NEXT: ret float [[RED_NEXT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
+ %red = phi float [ 0.000000e+00, %entry ], [ %red.next, %loop ]
+ %gep = getelementptr inbounds float, ptr %x, i32 %iv
+ %l = load float, ptr %gep, align 4
+ %red.next = tail call float @llvm.maximumnum.f32(float %red, float %l)
+ %inc = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %inc, 1024
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret float %red.next
+}
+
+define float @maximumnum_intrinsic_fast(ptr readonly %x) {
+; CHECK-LABEL: define float @maximumnum_intrinsic_fast(
+; CHECK-SAME: ptr readonly [[X:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, %[[ENTRY]] ], [ [[RED_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[X]], i32 [[IV]]
+; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP]], align 4
+; CHECK-NEXT: [[RED_NEXT]] = tail call fast float @llvm.maximumnum.f32(float [[RED]], float [[L]])
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[INC]], 1024
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi float [ [[RED_NEXT]], %[[LOOP]] ]
+; CHECK-NEXT: ret float [[RED_NEXT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
+ %red = phi float [ 0.000000e+00, %entry ], [ %red.next, %loop ]
+ %gep = getelementptr inbounds float, ptr %x, i32 %iv
+ %l = load float, ptr %gep, align 4
+ %red.next = tail call fast float @llvm.maximumnum.f32(float %red, float %l)
+ %inc = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %inc, 1024
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret float %red.next
+}
+
+define float @minimumnum_intrinsic(ptr readonly %x) {
+; CHECK-LABEL: define float @minimumnum_intrinsic(
+; CHECK-SAME: ptr readonly [[X:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, %[[ENTRY]] ], [ [[RED_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[X]], i32 [[IV]]
+; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP]], align 4
+; CHECK-NEXT: [[RED_NEXT]] = tail call float @llvm.minimumnum.f32(float [[RED]], float [[L]])
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[INC]], 1024
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi float [ [[RED_NEXT]], %[[LOOP]] ]
+; CHECK-NEXT: ret float [[RED_NEXT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
+ %red = phi float [ 0.000000e+00, %entry ], [ %red.next, %loop ]
+ %gep = getelementptr inbounds float, ptr %x, i32 %iv
+ %l = load float, ptr %gep, align 4
+ %red.next = tail call float @llvm.minimumnum.f32(float %red, float %l)
+ %inc = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %inc, 1024
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret float %red.next
+}
+
+define float @minimumnum_intrinsic_fast(ptr readonly %x) {
+; CHECK-LABEL: define float @minimumnum_intrinsic_fast(
+; CHECK-SAME: ptr readonly [[X:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, %[[ENTRY]] ], [ [[RED_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds float, ptr [[X]], i32 [[IV]]
+; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP]], align 4
+; CHECK-NEXT: [[RED_NEXT]] = tail call fast float @llvm.minimumnum.f32(float [[RED]], float [[L]])
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[INC]], 1024
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi float [ [[RED_NEXT]], %[[LOOP]] ]
+; CHECK-NEXT: ret float [[RED_NEXT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
+ %red = phi float [ 0.000000e+00, %entry ], [ %red.next, %loop ]
+ %gep = getelementptr inbounds float, ptr %x, i32 %iv
+ %l = load float, ptr %gep, align 4
+ %red.next = tail call fast float @llvm.minimumnum.f32(float %red, float %l)
+ %inc = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %inc, 1024
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret float %red.next
+}
+
+declare float @llvm.minimumnum.f32(float, float)
+declare float @llvm.maximumnum.f32(float, float)
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