[llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)
Shilei Tian via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 23 10:04:48 PDT 2025
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/135820
>From 81d3d1becb973639569a079d3a76cf9b72560d0f Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Wed, 23 Apr 2025 09:03:45 -0400
Subject: [PATCH] [AMDGPU][Verifier] Check address space of `alloca`
instruction
---
llvm/lib/IR/Verifier.cpp | 6 ++
llvm/test/Verifier/AMDGPU/alloca.ll | 98 +++++++++++++++++++++++++++++
2 files changed, 104 insertions(+)
create mode 100644 llvm/test/Verifier/AMDGPU/alloca.ll
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 843a78c1f41ad..2cdff75ff850b 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -4392,6 +4392,12 @@ void Verifier::visitAllocaInst(AllocaInst &AI) {
verifySwiftErrorValue(&AI);
}
+ if (TT.isAMDGPU()) {
+ Check(AI.getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS ||
+ AI.getAddressSpace() == AMDGPUAS::FLAT_ADDRESS,
+ "alloca on amdgpu must be in addrspace(0) or addrspace(5)", &AI);
+ }
+
visitInstruction(AI);
}
diff --git a/llvm/test/Verifier/AMDGPU/alloca.ll b/llvm/test/Verifier/AMDGPU/alloca.ll
new file mode 100644
index 0000000000000..d6d805bfdd805
--- /dev/null
+++ b/llvm/test/Verifier/AMDGPU/alloca.ll
@@ -0,0 +1,98 @@
+; RUN: not llvm-as %s --disable-output 2>&1 | FileCheck %s
+
+target triple = "amdgcn-amd-amdhsa"
+
+target datalayout = "A5"
+
+; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.1 = alloca i32, align 4, addrspace(1)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.2 = alloca i32, align 4, addrspace(2)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.3 = alloca i32, align 4, addrspace(3)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.4 = alloca i32, align 4, addrspace(4)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.6 = alloca i32, align 4, addrspace(6)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.7 = alloca i32, align 4, addrspace(7)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.8 = alloca i32, align 4, addrspace(8)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.9 = alloca i32, align 4, addrspace(9)
+define void @static_alloca() {
+entry:
+ %alloca.0 = alloca i32, align 4
+ %alloca.1 = alloca i32, align 4, addrspace(1)
+ %alloca.2 = alloca i32, align 4, addrspace(2)
+ %alloca.3 = alloca i32, align 4, addrspace(3)
+ %alloca.4 = alloca i32, align 4, addrspace(4)
+ %alloca.5 = alloca i32, align 4, addrspace(5)
+ %alloca.6 = alloca i32, align 4, addrspace(6)
+ %alloca.7 = alloca i32, align 4, addrspace(7)
+ %alloca.8 = alloca i32, align 4, addrspace(8)
+ %alloca.9 = alloca i32, align 4, addrspace(9)
+ ret void
+}
+
+; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
+define void @dynamic_alloca_i32(i32 %n) {
+entry:
+ %alloca.0 = alloca i32, i32 %n, align 4
+ %alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
+ %alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
+ %alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
+ %alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
+ %alloca.5 = alloca i32, i32 %n, align 4, addrspace(5)
+ %alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
+ %alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
+ %alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
+ %alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
+ ret void
+}
+
+; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
+define void @dynamic_alloca_i64(i64 %n) {
+entry:
+ %alloca.0 = alloca i32, i64 %n, align 4
+ %alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
+ %alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
+ %alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
+ %alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
+ %alloca.5 = alloca i32, i64 %n, align 4, addrspace(5)
+ %alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
+ %alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
+ %alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
+ %alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
+ ret void
+}
More information about the llvm-commits
mailing list