[llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)

[Vikash Gupta via llvm-commits]

vg0204 wrote:

> This feels like about 50x more code than should be required for this. Can you write some MIR tests for the specific pattern you are trying to handle?

@arsenm , this PR corresponds to https://ontrack-internal.amd.com/browse/SWDEV-523024 ticket, conatining the info & sample test for target pattern. Also, the attached images in them, also describes the same in generic way, alongwith a solution image based around this patch

https://github.com/llvm/llvm-project/pull/137137