[llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)

[Sergei Barannikov via llvm-commits]

https://github.com/s-barannikov approved this pull request.

LGTM, but I think @arsenm should take a look too.


https://github.com/llvm/llvm-project/pull/137096