[llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)

[Frederik Harwath via llvm-commits]

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@@ -2393,21 +2393,6 @@ SDValue AMDGPUTargetLowering::LowerSDIVREM(SDValue Op,
   return DAG.getMergeValues(Res, DL);
 }
 
-// (frem x, y) -> (fma (fneg (ftrunc (fdiv x, y))), y, x)
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frederik-h wrote:

No, would this be acceptable with `afn`?

https://github.com/llvm/llvm-project/pull/130988