[llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)

[David Green via llvm-commits]

https://github.com/davemgreen commented:

In Arm/AArch64 SDAG an integer extract and an fp extract can be treated differently. That is not as simple in GISel without type info to distinguish them (although it might be possible with i8 as there are no fp i8 types at the moment). Currently I believe GISel is (correctly) marking the load and vector insert on a fp regbank, so not expanding the types to i32. It would feel a bit artificial to do that.

There were some patches on the SDAG side recently to make some store-byte patterns work for i8. They go through a aarch64mfp8 type, which isn't the best but is of the correct size.

https://github.com/llvm/llvm-project/pull/135492