[llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)

[Shilei Tian via llvm-commits]

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@@ -0,0 +1,36 @@
+; RUN: not llvm-as %s --disable-output 2>&1 | FileCheck %s
+
+target triple = "amdgcn-amd-amdhsa"
+
+target datalayout = "A5"
+
+; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.1 = alloca i32, align 4, addrspace(1)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.2 = alloca i32, align 4, addrspace(2)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.3 = alloca i32, align 4, addrspace(3)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.4 = alloca i32, align 4, addrspace(4)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.6 = alloca i32, align 4, addrspace(6)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.7 = alloca i32, align 4, addrspace(7)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.8 = alloca i32, align 4, addrspace(8)
+; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
+; CHECK-NEXT: %alloca.9 = alloca i32, align 4, addrspace(9)
+define void @foo() {
+entry:
+  %alloca.0 = alloca i32, align 4
+  %alloca.1 = alloca i32, align 4, addrspace(1)
+  %alloca.2 = alloca i32, align 4, addrspace(2)
+  %alloca.3 = alloca i32, align 4, addrspace(3)
+  %alloca.4 = alloca i32, align 4, addrspace(4)
+  %alloca.5 = alloca i32, align 4, addrspace(5)
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shiltian wrote:

> The correct cases aren't doing anything here

The intention is exactly that the correct case should not have anything emit.

> correct constructs go in test/Assembler or are implied by their usual usage in other tests

Yes, their correctness is implied by other tests.

https://github.com/llvm/llvm-project/pull/135820