[llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)

[Simon Pilgrim via llvm-commits]

================
@@ -5752,6 +5752,33 @@ bool SelectionDAG::isKnownNeverNaN(SDValue Op, const APInt &DemandedElts,
     }
     return isKnownNeverNaN(Src, SNaN, Depth + 1);
   }
+  case ISD::INSERT_SUBVECTOR: {
+    SDValue BaseVector = Op.getOperand(0);
+    SDValue SubVector = Op.getOperand(1);
+    EVT BaseVectorVT = BaseVector.getValueType();
+    if (BaseVectorVT.isFixedLengthVector()) {
+      unsigned Idx = Op.getConstantOperandVal(2);
+      unsigned NumBaseVectorElts = BaseVectorVT.getVectorNumElements();
+      unsigned NumSubVectorElts =
+          SubVector.getValueType().getVectorNumElements();
+
+      // Clear the bits at the position where the subvector will be inserted.
+      APInt DemandedMask = APInt::getAllOnes(NumSubVectorElts)
+                               .zext(NumBaseVectorElts)
+                               .shl(Idx)
+                               .reverseBits();
+      APInt DemandedSrcElts = DemandedElts & DemandedMask;
+
+      // If DemandedSrcElts is zero, we only need to check that the subvector is
+      // never NaN.
+      if (DemandedSrcElts.isZero())
+        return isKnownNeverNaN(SubVector, SNaN, Depth + 1);
----------------
RKSimon wrote:

```
APInt DemandedSubElts = DemandedElts.extractBits(NumSubVectorElts, Idx);
return isKnownNeverNaN(SubVector, DemandedSubElts , SNaN, Depth + 1);
```
There might also be a case where DemandedSubElts == 0 and we just need to check:
```
return isKnownNeverNaN(BaseVector, DemandedSrcElts , SNaN, Depth + 1);
```

https://github.com/llvm/llvm-project/pull/131989