[llvm] [AArch64] Add tablegen patterns for i8 and i16 vector insert/extract pairs (PR #136091)

Nashe Mncube via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 22 03:31:22 PDT 2025

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https://github.com/nasherm approved this pull request.

LGTM. Seems like a useful improvement

https://github.com/llvm/llvm-project/pull/136091

Previous message: [llvm] [LLVM][CostModel][AArch64] Remove magic numbers from f16 vector compares. (PR #135795)
Next message: [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)
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