[llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 24 19:25:20 PDT 2025


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@@ -2577,14 +2584,36 @@ bool X86AsmParser::ParseIntelMemoryOperandSize(unsigned &Size) {
   return false;
 }
 
+uint16_t RegSizeInBits(const MCRegisterInfo &MRI, MCRegister RegNo) {
+  if (X86MCRegisterClasses[X86::GR8RegClassID].contains(RegNo))
+    return 8;
+  if (X86MCRegisterClasses[X86::GR16RegClassID].contains(RegNo))
+    return 16;
+  if (X86MCRegisterClasses[X86::GR32RegClassID].contains(RegNo))
+    return 32;
+  if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo))
+    return 64;
+  if (X86MCRegisterClasses[X86::RFP80RegClassID].contains(RegNo))
+    return 80;
+  if (X86MCRegisterClasses[X86::VR128RegClassID].contains(RegNo) ||
+      X86MCRegisterClasses[X86::VR128XRegClassID].contains(RegNo))
----------------
phoebewang wrote:

I don't think we can simply get the exact information. That's why AT&T syntax uses size prefix and Intel syntax uses `ptr` modifier.

BTW, what to do with instructions only have memory operand or the other operand is an immediate value?

https://github.com/llvm/llvm-project/pull/132751


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