[llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 24 02:14:26 PDT 2025


================
@@ -113,6 +113,44 @@ static DecodeStatus DecodeMR23RegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
+static const unsigned FPRDecoderTable[] = {
+    Xtensa::F0,  Xtensa::F1,  Xtensa::F2,  Xtensa::F3, Xtensa::F4,  Xtensa::F5,
+    Xtensa::F6,  Xtensa::F7,  Xtensa::F8,  Xtensa::F9, Xtensa::F10, Xtensa::F11,
+    Xtensa::F12, Xtensa::F13, Xtensa::F14, Xtensa::F15};
+
+static DecodeStatus DecodeFPRRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                           uint64_t Address,
+                                           const void *Decoder) {
+  if (RegNo >= std::size(FPRDecoderTable))
+    return MCDisassembler::Fail;
+
+  unsigned Reg = FPRDecoderTable[RegNo];
----------------
arsenm wrote:

```suggestion
  MCPhysReg Reg = FPRDecoderTable[RegNo];
```

https://github.com/llvm/llvm-project/pull/136086


More information about the llvm-commits mailing list