[llvm] [AArch64] Replace 64-bit MADD with [SU]MADDL when possible (PR #135926)

[David Green via llvm-commits]

davemgreen wrote:

> Got it, so SDAG is the preferred place to do such optimization ? I guess this should be closed then.

SDAG would be ideal, but I'm not sure if that would work reliably. It currently goes through the `LiveOutInfo` in SelectionDAG, which requires processing the input blocks before the current block is processed. This works well in some cases, but obviously doesn't work as well with a loop. Maybe if the loop had a single block there is something that could be done to combine the LiveOutInfo with the info from the current known-bits of the output register for that phi? It would need to be careful that it didn't invalidate/change the results once they were used. The other option available sometimes is to sink instructions into different blocks in a pre-isel pass (like CGP) to make sure the known-bits are known.

If that can't work then we still might need a patch like this that can do it properly across basic-blocks, so I wouldn't close it quite yet. If we do go this route it might be good to represent it as "known-bits" / "sign-bits" as we would in other parts of the compiler, and it will need some careful testing to make sure it is correct. Every time we add something to AArch64MIPeepholeOpt it feels like something goes wrong, and most combines are simpler than this one is.

https://github.com/llvm/llvm-project/pull/135926