The Week Of Monday 17 June 2024 Archives by date

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Starting: Mon Jun 17 00:02:05 PDT 2024
Ending: Sun Jun 23 23:57:32 PDT 2024
Messages: 4856

• [llvm] [llvm-cov] Coverage report HTML UI to jump between uncovered parts of code (PR #95662)   Hana Dusíková via llvm-commits
• [llvm] [TableGen][Docs] Fix `!range` markup (PR #95540)   Pengcheng Wang via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Pengcheng Wang via llvm-commits
• [llvm] [llvm-cov] Coverage report HTML UI to jump between uncovered parts of code (PR #95662)   NAKAMURA Takumi via llvm-commits
• [llvm] 5ef768d - [AMDGPULowerBufferFatPointers] Expand const exprs using fat pointers (#95558)   via llvm-commits
• [llvm] [AMDGPULowerBufferFatPointers] Expand const exprs using fat pointers (PR #95558)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][LIT] Added a MIR LIT showing the SGPR spills (PR #94584)   Vikash Gupta via llvm-commits
• [llvm] 525318e - [AMDGPU][LIT] Added a MIR LIT showing the SGPR spills (#94584)   via llvm-commits
• [llvm] [AMDGPU][LIT] Added a MIR LIT showing the SGPR spills (PR #94584)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU][LIT] Added a MIR LIT showing the SGPR spills (PR #94584)   via llvm-commits
• [llvm] 94a6b9c - [RISCV] Remove getOffsetOfLocalArea() (#93765)   via llvm-commits
• [llvm] [RISCV] Remove getOffsetOfLocalArea() (PR #93765)   Pengcheng Wang via llvm-commits
• [llvm] [MachineLICM] Fix regression introduced by d4b8b72 (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Fix regression introduced by d4b8b72 (PR #95746)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Nikita Popov via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Nikita Popov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Nikita Popov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Pierre van Houtryve via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] [docs][Security Group] Update Apple representation. (PR #95491)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   Dmitriy Chestnykh via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   Dmitriy Chestnykh via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Pierre van Houtryve via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [MachineLICM] Fix regression introduced by d4b8b72 (PR #95746)   Jay Foad via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   Dmitriy Chestnykh via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [MachineLICM] Fix regression introduced by d4b8b72 (PR #95746)   Matt Arsenault via llvm-commits
• [llvm] [GitHub][workflows] Use latest clang-format version 18.1.7 (PR #95757)   Owen Pan via llvm-commits
• [llvm] [GitHub][workflows] Use latest clang-format version 18.1.7 (PR #95757)   via llvm-commits
• [llvm] 9a86d0a - [InstCombine] Prefer source over result element type (NFC)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)   Nikita Popov via llvm-commits
• [clang] [llvm] Cleanup MC/DC intrinsics for #82448 (PR #95496)   via llvm-commits
• [llvm] [DebugInfo][TailCallElim] Drop the debug location of AccRecInstrNew (PR #95742)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [GlobalISel] Allow customizing instruction-select pass (PR #95724)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Yingwei Zheng via llvm-commits
• [llvm] [GitHub][workflows] Use latest clang-format version 18.1.7 (PR #95757)   Tobias Hieta via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Nikita Popov via llvm-commits
• [llvm] 995835f - [SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (#91871)   via llvm-commits
• [llvm] [SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Chen Zheng via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Chen Zheng via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Chen Zheng via llvm-commits
• [clang] [llvm] Cleanup MC/DC intrinsics for #82448 (PR #95496)   NAKAMURA Takumi via llvm-commits
• [llvm] [InstCombine] Add fold for fabs(-x) -> fabs(x) (PR #95627)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Add fold for fabs(-x) -> fabs(x) (PR #95627)   Matt Arsenault via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   David Green via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] ConstantFold logl calls (PR #94944)   David Green via llvm-commits
• [clang] [llvm] Cleanup MC/DC intrinsics for #82448 (PR #95496)   via llvm-commits
• [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)   Jacob Bramley via llvm-commits
• [llvm] 87aed82 - AMDGPU: Cleanup struct buffer atomic fadd intrinsic tests   Matt Arsenault via llvm-commits
• [llvm] MathExtras: rewrite some methods to never overflow (PR #95556)   Jay Foad via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Ilya Biryukov via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [clang] [llvm] Cleanup MC/DC intrinsics for #82448 (PR #95496)   NAKAMURA Takumi via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [MachineLICM] Fix regression introduced by d4b8b72 (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Nikita Popov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Nikita Popov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Nikita Popov via llvm-commits
• [llvm] f84056c - [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (#94638)   via llvm-commits
• [llvm] [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (PR #94638)   John Brawn via llvm-commits
• [llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)   Simon Pilgrim via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Jay Foad via llvm-commits
• [llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)   Simon Pilgrim via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Jay Foad via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][MC] Support UC_VERSION_* constants. (PR #95618)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][MC] Support UC_VERSION_* constants. (PR #95618)   Ivan Kosarev via llvm-commits
• [clang] [llvm] [BPF] Fix linking issues in static map initializers (PR #91310)   Nick Zavaritsky via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)   Momchil Velikov via llvm-commits
• [llvm] [SROA] Propagate no-signed-zeros(nsz) fast-math flag on the phi node using function attribute (PR #83381)   Sushant Gokhale via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] f06d969 - [LLVM][DAGCombiner] Extend coverage for insert_subv(undef, extract_subv(A, 0), 0) (#95242)   via llvm-commits
• [llvm] [LLVM][DAGCombiner] Extend coverage for insert_subv(undef, extract_subv(A, 0), 0) (PR #95242)   Paul Walker via llvm-commits
• [llvm] 52d87de - [Xtensa] Fix register asm parsing. (#95551)   via llvm-commits
• [llvm] [Xtensa] Fix register asm parsing. (PR #95551)   via llvm-commits
• [llvm] [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (PR #94638)   Nico Weber via llvm-commits
• [llvm] [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (PR #94638)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU][MC] Support UC_VERSION_* constants. (PR #95618)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] 770393b - [MachineLICM] Correctly Apply Register Masks (#95746)   via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (PR #94638)   John Brawn via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Joseph Huber via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   via llvm-commits
• [llvm] [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (PR #95770)   Pierre van Houtryve via llvm-commits
• [llvm] [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (PR #95770)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)   Jacek Caban via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [AMDGPU][WIP] Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)   Jacek Caban via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [AMDGPU][WIP] Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (PR #89226)   Dinar Temirbulatov via llvm-commits
• [llvm] [LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (PR #89226)   Dinar Temirbulatov via llvm-commits
• [llvm] [LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (PR #89226)   Dinar Temirbulatov via llvm-commits
• [llvm] [LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (PR #89226)   Dinar Temirbulatov via llvm-commits
• [llvm] [LoopVectorize] LLVM fails to vectorise loops with multi-bool varables (PR #89226)   Dinar Temirbulatov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   via llvm-commits
• [llvm] [NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (PR #95773)   Pierre van Houtryve via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (PR #95773)   via llvm-commits
• [llvm] [DebugInfo] Update sroa-extract-bits.ll test (PR #95774)   John Brawn via llvm-commits
• [llvm] [DebugInfo] Update sroa-extract-bits.ll test (PR #95774)   via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [CodeGen] Do not include $noreg in any regmask operands. NFCI. (PR #95775)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Do not include $noreg in any regmask operands. NFCI. (PR #95775)   via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] fb59d9b - [DebugInfo] Update sroa-extract-bits.ll test (#95774)   via llvm-commits
• [llvm] [DebugInfo] Update sroa-extract-bits.ll test (PR #95774)   John Brawn via llvm-commits
• [llvm] [DebugInfo] Handle DW_OP_LLVM_extract_bits in SROA (PR #94638)   John Brawn via llvm-commits
• [llvm] [DebugInfo] Update sroa-extract-bits.ll test (PR #95774)   John Brawn via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   via llvm-commits
• [llvm] [CodeGen] Do not include $noreg in any regmask operands. NFCI. (PR #95775)   Pierre van Houtryve via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] 457e895 - [CodeGen] Do not include $noreg in any regmask operands. NFCI. (#95775)   via llvm-commits
• [llvm] [CodeGen] Do not include $noreg in any regmask operands. NFCI. (PR #95775)   Jay Foad via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Nikita Popov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Paul T Robinson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   Paul Walker via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Ilya Biryukov via llvm-commits
• [llvm] 96e8d0f - [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (#92529)   via llvm-commits
• [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)   Momchil Velikov via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   Alexandre Ganea via llvm-commits
• [llvm] 405882d - AMDGPU: Fix legalization for llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16   Matt Arsenault via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95782)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95782)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95782)   via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   Alexandre Ganea via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95782)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Tomas Matheson via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Jay Foad via llvm-commits
• [llvm] 7767f0d - [InstCombine] Add test for #95547 (NFC)   Nikita Popov via llvm-commits
• [llvm] 534f856 - [InstCombine] Don't preserve context across div   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Paul T Robinson via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Paul T Robinson via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)   Vladislav Khmelevsky via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Joseph Huber via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Lucas Duarte Prates via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [AArch64][SVE] optimisation for unary SVE store intrinsics with no active lanes (PR #95793)   via llvm-commits
• [llvm] [AArch64][SVE] optimisation for unary SVE store intrinsics with no active lanes (PR #95793)   via llvm-commits
• [llvm] [AArch64][SVE] optimisation for unary SVE store intrinsics with no active lanes (PR #95793)   via llvm-commits
• [lld] Support finding pdb files from outputpath (PR #94153)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   Carlos Alberto Enciso via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   Carlos Alberto Enciso via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Shilei Tian via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Joseph Huber via llvm-commits
• [clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)   Matt Arsenault via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   Louis Dionne via llvm-commits
• [llvm] a1bdb01 - [VectorCombine] Change shuffleToIdentity to use Use. NFC   David Green via llvm-commits
• [llvm] [GlobalISel] Allow customizing instruction-select pass (PR #95724)   via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   via llvm-commits
• [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)   Momchil Velikov via llvm-commits
• [llvm] [VectorCombine] Add free concats to shuffleToIdentity. (PR #94954)   David Green via llvm-commits
• [llvm] [VectorCombine] Add free concats to shuffleToIdentity. (PR #94954)   David Green via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   via llvm-commits
• [llvm] [VectorCombine] Add free concats to shuffleToIdentity. (PR #94954)   David Green via llvm-commits
• [llvm] 4cf1a19 - Reapply "AMDGPU: Handle legal v2f16/v2bf16 atomicrmw fadd for global/flat (#95394)"   Matt Arsenault via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   Paul Walker via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   Tulio Magno Quites Machado Filho via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] Remove the Legacy PM Hello example (PR #95708)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)   Ye Luo via llvm-commits
• [llvm] [TableGen][Docs] Fix `!range` markup (PR #95540)   Piotr Fusik via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Jay Foad via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] c659e3a - [TableGen][Docs] Fix `!range` markup (#95540)   via llvm-commits
• [llvm] [TableGen][Docs] Fix `!range` markup (PR #95540)   Piotr Fusik via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Simon Pilgrim via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)   via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [llvm-c] Provide LLVMGetGEPResultElementType (PR #95693)   Nikita Popov via llvm-commits
• [llvm] d3da134 - [RISCV] Add coverage for vsetvli insertion at O0 [nfc]   Philip Reames via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (PR #94658)   Philip Reames via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [lld] c11677e - [LLD][COFF] Support finding pdb files from outputpath (#94153)   via llvm-commits
• [lld] Support finding pdb files from outputpath (PR #94153)   Alexandre Ganea via llvm-commits
• [lld] Support finding pdb files from outputpath (PR #94153)   Alexandre Ganea via llvm-commits
• [llvm] 964c92d - [RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (#94658)   via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Eliminate the AVLIsIgnored state (PR #94658)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Philip Reames via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Philip Reames via llvm-commits
• [llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)   via llvm-commits
• [llvm] 8fe376f - [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (#95781)   via llvm-commits
• [llvm] [llvm] Fix incorrect usage of `LIBXML2_INCLUDE_DIRS` in the Windows release script (PR #95781)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-c] Provide LLVMGetGEPResultElementType (PR #95693)   Vaivaswatha N via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   via llvm-commits
• [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)   Jeffrey Byrnes via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Philip Reames via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   via llvm-commits
• [llvm] [GitHub][workflows] Use latest clang-format version 18.1.7 (PR #95757)   Aiden Grossman via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Tomas Matheson via llvm-commits
• [llvm] [GlobalISel] Allow customizing instruction-select pass (PR #95724)   via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Tomas Matheson via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [llvm] [ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (PR #86149)   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU] Move FeatureMaxHardClauseLength32 into FeatureISAVersion12. NFC. (PR #95808)   Jay Foad via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Move FeatureMaxHardClauseLength32 into FeatureISAVersion12. NFC. (PR #95808)   via llvm-commits
• [llvm] b6476e5 - [LV] Retain branch in middle block when scalar epilogue is needed (NFC)   Florian Hahn via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [llvm] [ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (PR #86149)   Stephen Tozer via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   Tobias Hieta via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   Tobias Hieta via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [llvm] [llvm-cov] Coverage report HTML UI to jump between uncovered parts of code (PR #95662)   Hana Dusíková via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   David Tenty via llvm-commits
• [llvm] [AMDGPU] Move FeatureMaxHardClauseLength32 into FeatureISAVersion12. NFC. (PR #95808)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] e577f96 - [AMDGPU] Move FeatureMaxHardClauseLength32 into FeatureISAVersion12. NFC. (#95808)   via llvm-commits
• [llvm] [AMDGPU] Move FeatureMaxHardClauseLength32 into FeatureISAVersion12. NFC. (PR #95808)   Jay Foad via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] InstProfiling: Give names to profc_bias and profc_addr. NFC. (PR #95587)   Ellis Hoag via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Split vgpr regalloc pipeline (PR #93526)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Split vgpr regalloc pipeline (PR #93526)   Christudasan Devadasan via llvm-commits
• [llvm] [GitHub][workflows] Use latest clang-format version 18.1.7 (PR #95757)   Owen Pan via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   Arthur Eubanks via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   Arthur Eubanks via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Petr Hosek via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] d1a4f0c - [AArch64] Lower extending sitofp using tbl (#92528)   via llvm-commits
• [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)   Momchil Velikov via llvm-commits
• [llvm] fe3f8ad - [X86] getIntrinsicInstrCost - begin generalizing BSWAP load/store-folding handling.   Simon Pilgrim via llvm-commits
• [llvm] 7e3507e - [DAG] visitAVG - avoid duplication in the avg(ext(x), ext(y)) -> ext(avg(x, y)) folds   Simon Pilgrim via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Anton Korobeynikov via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Simon Pilgrim via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Jakub Kuderski via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Swap out range metadata to range attribute for arm_mve_pred_v2i (PR #94847)   Andreas Jonson via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Luke Lau via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Luke Lau via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Luke Lau via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Alexander Yermolovich via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Swap out range metadata to range attribute for arm_mve_pred_v2i (PR #94847)   Andreas Jonson via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Cooper Partin via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Cooper Partin via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (PR #86149)   Jonas Devlieghere via llvm-commits
• [llvm] [InstCombine] Combine ptrauth constants into ptrauth intrinsics. (PR #94705)   Daniil Kovalev via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Combine ptrauth constants into ptrauth intrinsics. (PR #94705)   Daniil Kovalev via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch with implicit default (PR #95665)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Canonicalize `icmp ult (add X, C2), C` expressions (PR #95649)   Antonio Frighetto via llvm-commits
• [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)   via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Combine ptrauth constant callee into bundle. (PR #94706)   Daniil Kovalev via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine ptrauth constant callee into bundle. (PR #94706)   Daniil Kovalev via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] a4b44c0 - [InstCombine] Canonicalize `icmp ult (add X, C2), C` expressions   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `icmp ult (add X, C2), C` expressions (PR #95649)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] AMDGPU: Cleanup selection patterns for buffer loads (PR #95378)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Anshil Gandhi via llvm-commits
• [llvm] [DXIL] Model DXIL Class specification of DXIL Ops in DXIL.td (PR #87803)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Model DXIL Class specification of DXIL Ops in DXIL.td (PR #87803)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [llvm] [AMDGPU] Split vgpr regalloc pipeline (PR #93526)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] 21ba91c - [SamplePGO] Add a cutoff for number of profile matching anchors (#95542)   via llvm-commits
• [llvm] [SamplePGO] Add a cutoff for number of profile matching anchors (PR #95542)   Krzysztof Pszeniczny via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GlobalISel] Allow more illegal vector types in params/returns. (PR #95514)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Arthur Eubanks via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Aaron Ballman via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (PR #95773)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Aaron Ballman via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Aaron Ballman via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Aaron Ballman via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Arjun P via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Arjun P via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   Sjoerd Meijer via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [PAC][AArch64] Lower ptrauth constants in code (PR #94241)   Daniil Kovalev via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] AMDGPU: Add description for new atomicrmw metadata (PR #85052)   Matt Arsenault via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   via llvm-commits
• [llvm] AMDGPU: Add description for new atomicrmw metadata (PR #85052)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add description for new atomicrmw metadata (PR #85052)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Thorsten Schütt via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify AMDGPU HSAMetadata (PR #94788)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Arjun P via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   Arthur Eubanks via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   Sjoerd Meijer via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   Sjoerd Meijer via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   David Green via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [llvm] [llvm-dwp] Fix merging of debug_str_offsets with multiple contributions (PR #90461)   David Blaikie via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #91023)   Kevin Frei via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Thorsten Schütt via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   David Green via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Shilei Tian via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Shivam Gupta via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Joseph Huber via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [mlir] [clang][lldb][mlir] Fix some identical sub-expressions warnings (NFC) (PR #95715)   Shivam Gupta via llvm-commits
• [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [AArch64] Fix v4i8 loads in strict-align mode. (PR #95828)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix v4i8 loads in strict-align mode. (PR #95828)   via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Damyan Pepper via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Damyan Pepper via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Damyan Pepper via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Damyan Pepper via llvm-commits
• [llvm] [symbolizer] Empty string is not an error (PR #92660)   David Blaikie via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Philip Reames via llvm-commits
• [llvm] 111507e - [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (#94686)   via llvm-commits
• [llvm] [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (PR #94686)   Philip Reames via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] 1d02815 - Revert "[RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals (#94686)"   Philip Reames via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Shilei Tian via llvm-commits
• [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)   Antonio Frighetto via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Joseph Huber via llvm-commits
• [llvm] 8756043 - [RISCV] Teach RISCVInsertVSETVLI to work without LiveIntervals   Philip Reames via llvm-commits
• [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)   Antonio Frighetto via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Shilei Tian via llvm-commits
• [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)   Antonio Frighetto via llvm-commits
• [llvm] c22d391 - [LVI][ConstantRange] Generalize mask not equal conditions handling   Antonio Frighetto via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Jon Chesterfield via llvm-commits
• [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Tomas Matheson via llvm-commits
• [llvm] [libc++] Restart all preempted jobs (PR #95565)   Louis Dionne via llvm-commits
• [llvm] [libc++] Restart all preempted jobs (PR #95565)   Louis Dionne via llvm-commits
• [llvm] [SLPVectorizer] Support SLPVectorizer cases of tan across all backends (PR #95517)   Farzon Lotfi via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] 06aa078 - [llvm-cov] Coverage report HTML UI to jump between uncovered parts of code (#95662)   via llvm-commits
• [llvm] [llvm-cov] Coverage report HTML UI to jump between uncovered parts of code (PR #95662)   Hana Dusíková via llvm-commits
• [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [llvm] [NFC][SamplePGO] Refactoring getFilteredAnchorList (PR #95830)   Lei Wang via llvm-commits
• [llvm] [NFC][SamplePGO] Refactoring getFilteredAnchorList (PR #95830)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Joseph Huber via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   Matt Arsenault via llvm-commits
• [llvm] 3b99729 - AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (#95783)   via llvm-commits
• [llvm] AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (PR #95783)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Matt Arsenault via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   Nathan Sidwell via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] 8930ac1 - AMDGPU: Cleanup selection patterns for buffer loads (#95378)   via llvm-commits
• [llvm] AMDGPU: Cleanup selection patterns for buffer loads (PR #95378)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix buffer load/store of pointers (PR #95379)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Joseph Huber via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [Offload] Change HSA header search order (PR #95769)   Joseph Huber via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Jon Roelofs via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [clang] [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)   Mats Petersson via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Matt Arsenault via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Joseph Huber via llvm-commits
• [lld] [llvm] [LLD][COFF] Make unresolved symbol search behavior compliant with MSVC link.exe (PR #85290)   Alexandre Ganea via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [AMDGPU] Split vgpr regalloc pipeline (PR #93526)   Christudasan Devadasan via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Zaara Syeda via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   Fabio D'Urso via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   Fabio D'Urso via llvm-commits
• [compiler-rt] [HWASan] [compiler-rt] support non-4k pages on Android (PR #95069)   Evgenii Stepanov via llvm-commits
• [compiler-rt] [tsan][aarch64] Fix branch protection in interceptors (PR #95839)   Tulio Magno Quites Machado Filho via llvm-commits
• [compiler-rt] [tsan][aarch64] Fix branch protection in interceptors (PR #95839)   via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   Fabio D'Urso via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #91023)   Kevin Frei via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   Martin Storsjö via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   Louis Dionne via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Martin Storsjö via llvm-commits
• [llvm] 7620fe0 - [CI][format] Explicitly pass extensions to git-clang-format (#95794)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [CI][format] Explicitly pass extensions to git-clang-format (PR #95794)   Louis Dionne via llvm-commits
• [compiler-rt] 5b04b6f - [HWASan] [compiler-rt] support non-4k pages on Android (#95069)   via llvm-commits
• [compiler-rt] [HWASan] [compiler-rt] support non-4k pages on Android (PR #95069)   Florian Mayer via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   Fabio D'Urso via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Vectorize i8 Shuffles (PR #95840)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Vectorize i8 Shuffles (PR #95840)   via llvm-commits
• [llvm] [AMDGPU] Vectorize i8 Shuffles (PR #95840)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU][WIP] Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Perform interleaving as VPlan-to-VPlan transform. (PR #94339)   Florian Hahn via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [mlgo] inline for size: add bypass mechanism for perserving performance (PR #95616)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)   Jeffrey Byrnes via llvm-commits
• [llvm] [mlgo] inline for size: add bypass mechanism for perserving performance (PR #95616)   Mircea Trofin via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [llvm] [inline] Clone return range attribute on the callsite into inlined call (PR #92666)   Arthur Eubanks via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [llvm][Support] Implement raw_socket_stream::readFromSocket with optional timeout (PR #92308)   Connor Sughrue via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   shaw young via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [compiler-rt] 16aa39a - [scudo] Update error handling for seondary cache entry count (#95595)   via llvm-commits
• [compiler-rt] [scudo] Update error handling for seondary cache entry count (PR #95595)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Update error handling for seondary cache entry count (PR #95595)   via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Helena Kotas via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [llvm] 6037a69 - [mlgo] inline for size: add bypass mechanism for perserving performance (#95616)   via llvm-commits
• [llvm] [mlgo] inline for size: add bypass mechanism for perserving performance (PR #95616)   Mircea Trofin via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   David Blaikie via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] AMDGPU: Add some addressing mode tests for flat atomic intrinsics (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (PR #94941)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (PR #94941)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (PR #94941)   Johannes Doerfert via llvm-commits
• [llvm] AMDGPU: Add some addressing mode tests for flat atomic intrinsics (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add some addressing mode tests for flat atomic intrinsics (PR #95852)   via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets (PR #95852)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [compiler-rt] [HWASan] [compiler-rt] support non-4k pages on Android (PR #95069)   Nico Weber via llvm-commits
• [compiler-rt] Revert "[HWASan] [compiler-rt] support non-4k pages on Android" (PR #95853)   Florian Mayer via llvm-commits
• [compiler-rt] 1adf0fa - Revert "[HWASan] [compiler-rt] support non-4k pages on Android" (#95853)   via llvm-commits
• [compiler-rt] Revert "[HWASan] [compiler-rt] support non-4k pages on Android" (PR #95853)   Florian Mayer via llvm-commits
• [compiler-rt] Revert "[HWASan] [compiler-rt] support non-4k pages on Android" (PR #95853)   via llvm-commits
• [compiler-rt] [HWASan] [compiler-rt] support non-4k pages on Android (PR #95069)   Florian Mayer via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] 6b54ecc - [mlgo] remove `inlining_default` - unused feature   Mircea Trofin via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Michael Maitland via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [IRSim] Fix overlap() (PR #92988)   Justin Fargnoli via llvm-commits
• [llvm] [IRSim] Fix overlap() (PR #92988)   Justin Fargnoli via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   Kacper Michajłow via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Xuan Zhang via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Jorge Gorbe Moya via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Fargnoli via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Lebar via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Lebar via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Adrian Vogelsgesang via llvm-commits
• [llvm] cd48335 - [docs][Security Group] Update Apple representation. (#95491)   via llvm-commits
• [llvm] [docs][Security Group] Update Apple representation. (PR #95491)   Ahmed Bougacha via llvm-commits
• [lld] [lld-macho][NFC] Track category merger input data source language for better verification (PR #95473)   via llvm-commits
• [compiler-rt] c6049e6 - Reapply "[HWASan] [compiler-rt] support non-4k pages on Android" (#95853)   Florian Mayer via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Jakub Kuderski via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   Arthur Eubanks via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   Arthur Eubanks via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Jonathan Thackray via llvm-commits
• [llvm] [mlgo] inline for size: add bypass mechanism for perserving performance (PR #95616)   Arthur Eubanks via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Fargnoli via llvm-commits
• [llvm] [NewPM][BPF] Add `BPFCodeGenPassBuilder` (PR #94158)   via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Craig Topper via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Craig Topper via llvm-commits
• [llvm] [mlgo] inline for size: add bypass mechanism for perserving performance (PR #95616)   Mircea Trofin via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Craig Topper via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Craig Topper via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][tests] Fix jrcxz instruction test (PR #95861)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][tests] Fix jrcxz instruction test (PR #95861)   via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   via llvm-commits
• [llvm] [memprof] Use std::vector<Frame> instead of llvm::SmallVector<Frame> (NFC) (PR #94432)   David Blaikie via llvm-commits
• [llvm] [llvm][Support] Implement raw_socket_stream::read with optional timeout (PR #92308)   Connor Sughrue via llvm-commits
• [llvm] [SLP]Improve reordering for consts, splats and ops from same nodes + improved analysis. (PR #87091)   Elvina Yakubova via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   via llvm-commits
• [llvm] [SLP]Improve reordering for consts, splats and ops from same nodes + improved analysis. (PR #87091)   Elvina Yakubova via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [BOLT][tests] Fix jrcxz instruction test (PR #95861)   Amir Ayupov via llvm-commits
• [llvm] [SLP]Improve reordering for consts, splats and ops from same nodes + improved analysis. (PR #87091)   Alexey Bataev via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [Attributor]: allow more than one offset for a pass through user in AAPointerInfo (PR #94416)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor]: allow more than one offset for a pass through user in AAPointerInfo (PR #94416)   Johannes Doerfert via llvm-commits
• [llvm] bea329e - [Attributor]: allow more than one offset for a pass through user in AAPointerInfo (#94416)   via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   shaw young via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [BOLT][tests] Fix jrcxz instruction test (PR #95861)   Maksim Panchenko via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   shaw young via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add sink block to flow CFG in profile inference (PR #95047)   shaw young via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Jeff Niu via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Jeff Niu via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Jeff Niu via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Helena Kotas via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Kai Luo via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Kyungwoo Lee via llvm-commits
• [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)   Nathan Chancellor via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Yaxun Liu via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Eli Friedman via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Eli Friedman via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Eli Friedman via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   Caslyn Tonelli via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   Caslyn Tonelli via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [ProfileData] Remove getValueProfDataFromInst (PR #95617)   Mingming Liu via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Kai Luo via llvm-commits
• [llvm] [Analysis] Clean up getPromotionCandidatesForInstruction (NFC) (PR #95624)   Mingming Liu via llvm-commits
• [llvm] [llvm][Support] Implement raw_socket_stream::read with optional timeout (PR #92308)   Connor Sughrue via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Kai Luo via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Kai Luo via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Mingming Liu via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [coverage] Add option for keeping mappings order (PR #91600)   NAKAMURA Takumi via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   via llvm-commits
• [lld] [lld-macho][NFC] Track category merger input data source language for better verification (PR #95473)   Kyungwoo Lee via llvm-commits
• [llvm] d6b0b7a - [ProfileData] Remove getValueProfDataFromInst (#95617)   via llvm-commits
• [llvm] [ProfileData] Remove getValueProfDataFromInst (PR #95617)   Kazu Hirata via llvm-commits
• [llvm] 2c2f490 - [Analysis] Clean up getPromotionCandidatesForInstruction (NFC) (#95624)   via llvm-commits
• [llvm] [Analysis] Clean up getPromotionCandidatesForInstruction (NFC) (PR #95624)   Kazu Hirata via llvm-commits
• [lld] d68eb5b - [lld-macho][NFC] Track category merger input data source language for better verification (#95473)   via llvm-commits
• [lld] [lld-macho][NFC] Track category merger input data source language for better verification (PR #95473)   via llvm-commits
• [llvm] 117921e - [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (#94593)   via llvm-commits
• [llvm] [PowerPC] Alignment of toc-data symbol should not be increased during optimizations (PR #94593)   Kai Luo via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Lang Hames via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Maksim Panchenko via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [emacs] Handle vector types, arbitary integer types and function names (PR #88246)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Chen Zheng via llvm-commits
• [llvm] [emacs] Handle vector types, arbitary integer types and function names (PR #88246)   Luke Lau via llvm-commits
• [llvm] e4b130f - [emacs] Handle vector types, arbitary integer types and function names (#88246)   via llvm-commits
• [llvm] [emacs] Handle vector types, arbitary integer types and function names (PR #88246)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Jun Wang via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Michael Maitland via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [llvm] [ARM64EC] Fix thunks for C++ methods returning structs. (PR #95876)   Eli Friedman via llvm-commits
• [llvm] [ARM64EC] Fix thunks for C++ methods returning structs. (PR #95876)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)   Kareem Ergawy via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)   Mikhail Gudim via llvm-commits
• [llvm] [MachineLoopInfo] Implement `isLoopInvariant` recursively. (PR #95285)   Mikhail Gudim via llvm-commits
• [llvm] InstProfiling: Give names to profc_bias and profc_addr. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] InstProfiling: Give names to profc_bias and profc_addr. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] InstProfiling: Give the name to profc_bias. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] InstProfiling: Give the name to profc_bias. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   Mikhail Gudim via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   Mikhail Gudim via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] 049630d - [NFC][NVPTX][test] Update test for `fneg half` (#95856)   via llvm-commits
• [llvm] [NFC][NVPTX][test] Update test for `fneg half` (PR #95856)   Justin Fargnoli via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [mlir] [mlir][GPU] Move `GPUDeviceMappingAttr.td` to `GPU/IR`. (PR #95880)   via llvm-commits
• [llvm] [mlir] [mlir][GPU] Move `GPUDeviceMappingAttr.td` to `GPU/IR`. (PR #95880)   via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Helena Kotas via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Maksim Panchenko via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Maksim Panchenko via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Farzon Lotfi via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   Arthur Eubanks via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)   Yingwei Zheng via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chandler Carruth via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   Tobias Hieta via llvm-commits
• [llvm] e5d0627 - [ORC] Preserve order of constructors with same priority (#95532)   via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Matt Arsenault via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Yingwei Zheng via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Karthika Devi C via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Lang Hames via llvm-commits
• [llvm] [CodeGen] Do not emit TRAP for `unreachable` after `@llvm.trap` (PR #94570)   Igor Kudrin via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] [CodeGen] Do not emit TRAP for `unreachable` after `@llvm.trap` (PR #94570)   Igor Kudrin via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Pengcheng Wang via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [clang] [llvm] Cleanup MC/DC intrinsics for #82448 (PR #95496)   NAKAMURA Takumi via llvm-commits
• [llvm] [CodeGen] Do not emit TRAP for `unreachable` after `@llvm.trap` (PR #94570)   Igor Kudrin via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Eli Friedman via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Eli Friedman via llvm-commits
• [llvm] AMDGPU: Create pseudo to real mapping for flat/buffer atomic fmin/fmax (PR #95591)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Pengcheng Wang via llvm-commits
• [llvm] Recommit "[Inliner] Propagate callee argument memory access attributes before inlining" (2nd Try) (PR #95888)   via llvm-commits
• [llvm] Recommit "[Inliner] Propagate callee argument memory access attributes before inlining" (2nd Try) (PR #95888)   via llvm-commits
• [clang] [llvm] [llvm][Support] Stop using PWD in current_path (PR #94544)   Iñaki Amatria Barral via llvm-commits
• [clang] [llvm] [llvm][Support] Stop using PWD in current_path (PR #94544)   Iñaki Amatria Barral via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Green via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Green via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Green via llvm-commits
• [llvm] [AArch64] Fix v4i8 loads in strict-align mode. (PR #95828)   David Green via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] 6ec02f7 - [AArch64] Refactor redundant PTEST optimisations (NFC) (#87802)   via llvm-commits
• [llvm] [AArch64] Refactor redundant PTEST optimisations (NFC) (PR #87802)   Momchil Velikov via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   Martin Storsjö via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Green via llvm-commits
• [llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)   David Green via llvm-commits
• [llvm] edd6f0c - Revert "[ORC] Preserve order of constructors with same priority (#95532)"   Jonas Hahnfeld via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [llvm] d95b82c - [NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (#95773)   via llvm-commits
• [llvm] [NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (PR #95773)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets (PR #95852)   Jay Foad via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] 3ca1744 - [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (#91422)   via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   James Henderson via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   James Henderson via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   James Henderson via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Craig Topper via llvm-commits
• [llvm] [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (PR #94941)   Ethan Luis McDonough via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Craig Topper via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] db394ed - [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (#95535)   via llvm-commits
• [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions. (PR #95535)   Carlos Alberto Enciso via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Craig Topper via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Sherwood via llvm-commits
• [llvm] 89c26f6 - [analyzer][NFC] Reorganize Z3 report refutation   via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [analyzer] Harden safeguards for Z3 query times (PR #95129)   Balazs Benics via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [clang] [llvm] [analyzer] Harden safeguards for Z3 query times (PR #95129)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer] Harden safeguards for Z3 query times (PR #95129)   Balazs Benics via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] a6eddf9 - [Loads] Pass DominatorTree if available (#95752)   via llvm-commits
• [llvm] [Loads] Pass DominatorTree if available (PR #95752)   via llvm-commits
• [llvm] InstrProfiling.cpp: Let lowerIntrinsics() able to insert BBs. (PR #95585)   Jessica Paquette via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   Jessica Paquette via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Green via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   Jessica Paquette via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Sherwood via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Sherwood via llvm-commits
• [clang-tools-extra] [llvm] [llvm] Remove the Legacy PM Hello example (PR #95708)   Andrzej Warzyński via llvm-commits
• [llvm] 8b0d38b - [llvm] Remove the Legacy PM Hello example (#95708)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] Remove the Legacy PM Hello example (PR #95708)   Andrzej Warzyński via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   Sjoerd Meijer via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   via llvm-commits
• [llvm] 0e21f12 - [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (#95236)   via llvm-commits
• [llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)   via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   via llvm-commits
• [llvm] [SPIRV] Add definitions for NonSemantic debug info (PR #95530)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add definitions for NonSemantic debug info (PR #95530)   Nathan Gauër via llvm-commits
• [clang] [llvm] Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (PR #95519)   Tomas Matheson via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Nathan Gauër via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [llvm] f07d300 - [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (#92145)   via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)   Tomas Matheson via llvm-commits
• [llvm] aabf6df - [RISCV] Remove redundant dependency on SlotIndexes in RISCVInsertVSETVLI. NFC   Luke Lau via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] RegPressure: Fix incorrect comment. NFC (PR #95896)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] RegPressure: Fix incorrect comment. NFC (PR #95896)   via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [llvm] fed8e38 - [LLD][COFF] Add support for ARM64EC entry thunks. (#88132)   via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)   Jacek Caban via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] RegPressure: Fix incorrect comment. NFC (PR #95896)   Matt Arsenault via llvm-commits
• [llvm] RegPressure: Fix incorrect comment. NFC (PR #95896)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Lucas Duarte Prates via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Lucas Duarte Prates via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Lucas Duarte Prates via llvm-commits
• [llvm] 7ea203b - RegPressure: Fix incorrect comment. NFC (#95896)   via llvm-commits
• [llvm] RegPressure: Fix incorrect comment. NFC (PR #95896)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   Nikita Popov via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lower GlobalAddress/BlockAddress/JumpTable (PR #95256)   Andrei Safronov via llvm-commits
• [llvm] ca7dc89 - [AArch64][SME] Remove unused ZA lazy-save (#81648)   via llvm-commits
• [llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)   Sam Tebbs via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Jonathan Thackray via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Jonathan Thackray via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Martin Storsjö via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Paul Walker via llvm-commits
• [llvm] [Transforms][NFC] Tiny fixes in SplitModule (PR #95903)   Ilia Sergachev via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Sven Verdoolaege via llvm-commits
• [llvm] [Transforms][NFC] Tiny fixes in SplitModule (PR #95903)   via llvm-commits
• [llvm] [Transforms][NFC] Tiny fixes in SplitModule (PR #95903)   via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Matt Arsenault via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   David Spickett via llvm-commits
• [compiler-rt] [libFuzzer] Fix incorrect coverage number in fork mode (PR #82335)   Pavel Golubev via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets gfx7-gfx11 (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] 1d97f8f - AMDGPU: Add some addressing mode tests for flat atomic intrinsics   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets gfx7-gfx11 (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)   Matt Arsenault via llvm-commits
• [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)   Matt Arsenault via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   David Green via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU][WIP] Optimize SGPR spills (PR #93668)   Matt Arsenault via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify AMDGPU HSAMetadata (PR #94788)   Janek van Oirschot via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   Paul Walker via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] 612fdf3 - [X86] Add AVX1 v8i32 comparison test coverage   Simon Pilgrim via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Stephen Tozer via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify AMDGPU HSAMetadata (PR #94788)   Matt Arsenault via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Stephen Tozer via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch with implicit default (PR #95665)   via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Nikita Popov via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   David Spickett via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Martin Storsjö via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   David Spickett via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   David Spickett via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Martin Storsjö via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [llvm] eda9ff8 - AMDGPU: Flat instructions do not have signed offsets gfx7-gfx11 (#95852)   via llvm-commits
• [llvm] AMDGPU: Flat instructions do not have signed offsets gfx7-gfx11 (PR #95852)   Matt Arsenault via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   David Spickett via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Paul Walker via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Paul Walker via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Paul Walker via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [llvm] 66aa260 - [gn] port 8b0d38be9ece414   Nico Weber via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Paul Walker via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)   Pierre van Houtryve via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] 9e63632 - [gn build] Port 89c26f6c7b0a   LLVM GN Syncbot via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [InstCombine] simplify average of lsb (PR #95684)   Hendrik Hübner via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   Freddy Ye via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Matt Arsenault via llvm-commits
• [llvm] [coverage] Add option for keeping mappings order (PR #91600)   via llvm-commits
• [llvm] ced41a1 - [InstCombine] Remove redundant urem demanded bits case   Nikita Popov via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [llvm] 1a0a4d0 - [GlobalISel] Allow more illegal vector types in params/returns. (#95514)   via llvm-commits
• [llvm] [GlobalISel] Allow more illegal vector types in params/returns. (PR #95514)   David Green via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] InstrProfiling.cpp: Let lowerIntrinsics() able to insert BBs. (PR #95585)   NAKAMURA Takumi via llvm-commits
• [llvm] d97951e - Reland "[ORC] Preserve order of constructors with same priority (#95532)"   David Spickett via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Nikita Popov via llvm-commits
• [llvm] d38c8a7 - ConstantFold logl calls (#94944)   via llvm-commits
• [llvm] ConstantFold logl calls (PR #94944)   Matthew Devereau via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   David Spickett via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Jonas Hahnfeld via llvm-commits
• [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [llvm] 79e668f - [InstCombine] Fix funnel shift bailout in demanded bits simplification   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   NAKAMURA Takumi via llvm-commits
• [llvm] [LLVM][CMake] Set LANG to "C" before linker detection. (PR #95913)   Carlo Bramini via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] [MIPS] Fix wrong errors being emitted when rejecting certain assembly… (PR #94695)   Jesse D via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [analyzer] Harden safeguards for Z3 query times (PR #95129)   Balazs Benics via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] clang/AMDGPU: Emit atomicrmw from ds_fadd builtins (PR #95395)   Matt Arsenault via llvm-commits
• [llvm] e42a4c7 - [Analysis] Fix -Wunused-function in ConstantFolding.cpp (NFC)   Jie Fu via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [X86] Fold concat(PCMP*(), PCMP*()) -> CMPPS(concat, concat) on AVX1 targets (PR #95915)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold concat(PCMP*(), PCMP*()) -> CMPPS(concat, concat) on AVX1 targets (PR #95915)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   Mikael Holmén via llvm-commits
• [llvm] 8fc9c03 - [analyzer] Revert Z3 changes (#95916)   via llvm-commits
• [clang] [llvm] [analyzer] Revert Z3 changes (PR #95916)   Balazs Benics via llvm-commits
• [clang] [llvm] [analyzer][NFC] Reorganize Z3 report refutation (PR #95128)   Mikael Holmén via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Spickett via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [llvm] eb3e544 - [gn build] Port 8fc9c03cded0   LLVM GN Syncbot via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [LICM] Fold associative binary ops to promote code hoisting (PR #81608)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Michael Maitland via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Anshil Gandhi via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Valery Pykhtin via llvm-commits
• [llvm] aede380 - [RISCV] Add processor definition for SpacemiT-X60 (#94564)   via llvm-commits
• [clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)   Shao-Ce SUN via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Nikita Popov via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   via llvm-commits
• [llvm] 1d76bf9 - [SimplifyCFG] Remove unnecessary content in `ForwardSwitchConditionToPHI.ll` (NFC)   via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   Matt Arsenault via llvm-commits
• [llvm] 66959ff - [Analysis] Fix -Wunused-function in ConstantFolding.cpp (NFC)   Jie Fu via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   via llvm-commits
• [llvm] [LLVM][CMake] Set LANG to "C" before linker detection. (PR #95913)   Sergei Barannikov via llvm-commits
• [llvm] InstProfiling: Give the name to profc_bias. NFC. (PR #95587)   Ellis Hoag via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   Tim Gymnich via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   via llvm-commits
• [llvm] d9a00ed - [MachineOutliner] Leaf Descendants (#90275)   via llvm-commits
• [llvm] [MachineOutliner] Leaf Descendants (PR #90275)   Kyungwoo Lee via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Kito Cheng via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   Nikita Popov via llvm-commits
• [llvm] [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (PR #95770)   Teresa Johnson via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [clang] [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)   Kareem Ergawy via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   Krzysztof Drewniak via llvm-commits
• [llvm] 440af98 - [InstCombine] Avoid use of ConstantExpr::getShl()   Nikita Popov via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [clang] [llvm] Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (PR #95519)   Alexandros Lamprineas via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   David Green via llvm-commits
• [llvm] [ARM64EC] Fix thunks for C++ methods returning structs. (PR #95876)   Jacek Caban via llvm-commits
• [llvm] 76e889d - [InstCombine] Avoid use of ConstantExpr::getShl()   Nikita Popov via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] d314cf2 - [InstCombine] Avoid use of ConstantExpr::getShl()   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][MC] Support UC_VERSION_* constants. (PR #95618)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][MC] Support UC_VERSION_* constants. (PR #95618)   Ivan Kosarev via llvm-commits
• [clang] [llvm] Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (PR #95519)   Tomas Matheson via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] DAG: Fix asserting on invalid inline asm constraints (PR #95935)   Matt Arsenault via llvm-commits
• [llvm] DAG: Fix asserting on invalid inline asm constraints (PR #95935)   Matt Arsenault via llvm-commits
• [llvm] DAG: Fix asserting on invalid inline asm constraints (PR #95935)   via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   David Green via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] (Draft) [SimplifyIndVar] Push more users to worklist for simplifyUsers (PR #93598)   via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Philip Reames via llvm-commits
• [clang] [llvm] Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (PR #95519)   Alexandros Lamprineas via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] 6be6c3a - [InstCombine] Use disjoint flag for alternate binops   Nikita Popov via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Christudasan Devadasan via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] 534e3ad - [InstCombine] Avoid use of ConstantExpr::getShl()   Nikita Popov via llvm-commits
• [llvm] [RFC][LV] VPlan-based cost model (PR #67647)   Kolya Panchenko via llvm-commits
• [llvm] 5aaf2ab - [Reassociate] Avoid use of ConstantExpr::getShl()   Nikita Popov via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Matt Arsenault via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   Fabio D'Urso via llvm-commits
• [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)   Jacek Caban via llvm-commits
• [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)   Jacek Caban via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   Fabio D'Urso via llvm-commits
• [llvm] DAG: Fix asserting on invalid inline asm constraints (PR #95935)   Renato Golin via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] 3eb4128 - [StackTagging] Generate test checks (NFC)   Nikita Popov via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [IR] Mark shl constant expression as undesirable (PR #95940)   Nikita Popov via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [IR] Mark shl constant expression as undesirable (PR #95940)   via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [llvm] [Transforms] Add a new algorithm to SplitModule (PR #95941)   Ilia Sergachev via llvm-commits
• [llvm] [Transforms] Add a new algorithm to SplitModule (PR #95941)   via llvm-commits
• [llvm] [Transforms] Add a new algorithm to SplitModule (PR #95941)   via llvm-commits
• [llvm] [LLVM][CMake] Set LANG to "C" before linker detection. (PR #95913)   Carlo Bramini via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Tomas Matheson via llvm-commits
• [llvm] [symbolizer] Empty string is not an error (PR #92660)   Serge Pavlov via llvm-commits
• [llvm] [LLVM][CMake] Set LANG to "C" before linker detection. (PR #95913)   Carlo Bramini via llvm-commits
• [llvm] 4b9112e - [AMDGPU]Optimize SGPR spills (#93668)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   via llvm-commits
• [llvm] workflows: Add a new job for packaging release sources (PR #91834)   Tom Stellard via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Nikita Popov via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Paul Walker via llvm-commits
• [llvm] [IR] Mark shl constant expression as undesirable (PR #95940)   Philip Reames via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Philip Reames via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   Alan Phipps via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   Shengchen Kan via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   Shengchen Kan via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Kyungwoo Lee via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   David Blaikie via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   David Blaikie via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)   Ameer J via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Sven Verdoolaege via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Michael Maitland via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [lld] Move HIP fatbin sections farther away from .text (PR #95949)   Siu Chi Chan via llvm-commits
• [lld] Move HIP fatbin sections farther away from .text (PR #95949)   via llvm-commits
• [llvm] [GlobalIsel] Combine G_PTR_ADD. (PR #95647)   Thorsten Schütt via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   David Green via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   Matt Arsenault via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Ilya Biryukov via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Ilya Biryukov via llvm-commits
• [llvm] [ARM64EC] Fix thunks for C++ methods returning structs. (PR #95876)   Daniel Paoliello via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [X86AsmParser] IntelExpression: End of Statement should check for valid end state (PR #95677)   via llvm-commits
• [llvm] ae6f730 - [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (#95869)   via llvm-commits
• [llvm] [JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (PR #95869)   Maksim Panchenko via llvm-commits
• [llvm] [X86AsmParser] IntelExpression: End of Statement should check for valid end state (PR #95677)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chandler Carruth via llvm-commits
• [llvm] [X86AsmParser] IntelExpression: End of Statement should check for valid end state (PR #95677)   via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] 8520061 - AMDGPU: Support local atomicrmw fmin/fmax for float/double (#95590)   via llvm-commits
• [llvm] AMDGPU: Support local atomicrmw fmin/fmax for float/double (PR #95590)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] b629d4b - [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (#94941)   via llvm-commits
• [llvm] [Attributor] Prevent infinite loop in AAGlobalValueInfoFloating (PR #94941)   Ethan Luis McDonough via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Tim Gymnich via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [mlir] [mlir][GPU] Move `GPUDeviceMappingAttr.td` to `GPU/IR`. (PR #95880)   Han-Chung Wang via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Green via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Joseph Huber via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Joseph Huber via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify AMDGPU HSAMetadata (PR #94788)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify AMDGPU HSAMetadata (PR #94788)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Aakanksha Patil via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Aakanksha Patil via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Aakanksha Patil via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [llvm] 62b5196 - DAG: Fix asserting on invalid inline asm constraints (#95935)   via llvm-commits
• [llvm] DAG: Fix asserting on invalid inline asm constraints (PR #95935)   Matt Arsenault via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Aakanksha Patil via llvm-commits
• [clang] [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Justin Fargnoli via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [mlir] [mlir][GPU] Move `GPUDeviceMappingAttr.td` to `GPU/IR`. (PR #95880)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Jan Patrick Lehr via llvm-commits
• [llvm] [Attributor] Reordering bins of an allocation based on access patterns (PR #95319)   Vidush Singhal via llvm-commits
• [llvm] [AArch64] Fix v4i8 loads in strict-align mode. (PR #95828)   Vitaly Cheptsov via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   David Green via llvm-commits
• [llvm] 8570685 - [AArch64] Fix v4i8 loads in strict-align mode. (#95828)   via llvm-commits
• [llvm] [AArch64] Fix v4i8 loads in strict-align mode. (PR #95828)   Eli Friedman via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Paul Walker via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Thorsten Schütt via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   Stanislav Mekhanoshin via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Paul Walker via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] b932da1 - AMDGPU: Fix vector handling in pown libcall simplification (#95832)   via llvm-commits
• [llvm] AMDGPU: Fix vector handling in pown libcall simplification (PR #95832)   Matt Arsenault via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Ellis Hoag via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Ellis Hoag via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Ellis Hoag via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Ellis Hoag via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   David Green via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] b1477eb - [ARM64EC] Fix thunks for C++ methods returning structs. (#95876)   via llvm-commits
• [llvm] [ARM64EC] Fix thunks for C++ methods returning structs. (PR #95876)   Eli Friedman via llvm-commits
• [llvm] [IR] Mark shl constant expression as undesirable (PR #95940)   Eli Friedman via llvm-commits
• [compiler-rt] 6f13f0b - [scudo] Test secondary cache options only if enabled (#95872)   via llvm-commits
• [compiler-rt] [scudo] Test secondary cache options only if enabled (PR #95872)   Caslyn Tonelli via llvm-commits
• [llvm] [X86] Fold concat(PCMP*(), PCMP*()) -> CMPPS(concat, concat) on AVX1 targets (PR #95915)   via llvm-commits
• [llvm] [SLP]Improve/fix extracts calculations for non-power-of-2 elements. (PR #93213)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold concat(PCMP*(), PCMP*()) -> CMPPS(concat, concat) on AVX1 targets (PR #95915)   via llvm-commits
• [llvm] 35a2b60 - [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (#95849)   via llvm-commits
• [clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)   Helena Kotas via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Yingwei Zheng via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   Eli Friedman via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   Eli Friedman via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Vitaly Buka via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   David Blaikie via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Vitaly Buka via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Tim Gymnich via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   Tim Gymnich via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   Ellis Hoag via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [llvm-config] Make llvm-config --system-libs obey LLVM_USE_STATIC_ZSTD. (PR #93754)   Kyle Huey via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Vitaly Buka via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Hassnaa Hamdi via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Vitaly Buka via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Vitaly Buka via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   Ellis Hoag via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Hassnaa Hamdi via llvm-commits
• [llvm] [SPIR-V] Add __spirv_ wrapper to the OpAtomicExchange instruction (PR #95961)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [SPIR-V] Add __spirv_ wrapper to the OpAtomicExchange instruction (PR #95961)   via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Arthur Eubanks via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   via llvm-commits
• [llvm] InstrProfiling.cpp: Let lowerIntrinsics() able to insert BBs. (PR #95585)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Eli Friedman via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Eli Friedman via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Eli Friedman via llvm-commits
• [clang] [llvm] [BPF] Fix linking issues in static map initializers (PR #91310)   David Blaikie via llvm-commits
• [llvm] [WebAssembly] Treat 'rethrow' as terminator in custom isel (PR #95967)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Treat 'rethrow' as terminator in custom isel (PR #95967)   via llvm-commits
• [llvm] [WebAssembly] Treat 'rethrow' as terminator in custom isel (PR #95967)   via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Jon Roelofs via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Arthur Eubanks via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Louis Dionne via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Louis Dionne via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Louis Dionne via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Farzon Lotfi via llvm-commits
• [lld] Move HIP fatbin sections farther away from .text (PR #95949)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Sven Verdoolaege via llvm-commits
• [clang] [llvm] clang/AMDGPU: Emit atomicrmw from ds_fadd builtins (PR #95395)   Yaxun Liu via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Peter Smith via llvm-commits
• [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)   Jeffrey Byrnes via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   via llvm-commits
• [llvm] AMDGPU: Fix buffer load/store of pointers (PR #95379)   Krzysztof Drewniak via llvm-commits
• [llvm] 76894c5 - clang/AMDGPU: Emit atomicrmw from ds_fadd builtins (#95395)   via llvm-commits
• [clang] [llvm] clang/AMDGPU: Emit atomicrmw from ds_fadd builtins (PR #95395)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Remove ds atomic fadd intrinsics (PR #95396)   Matt Arsenault via llvm-commits
• [llvm] 89fd195 - AMDGPU: Fix buffer load/store of pointers (#95379)   via llvm-commits
• [llvm] AMDGPU: Fix buffer load/store of pointers (PR #95379)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   Matt Arsenault via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [llvm] 0863bd8 - [LLVM] Add option to store Parent-pointer in ilist_node_base (#94224)   via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [BOLT] Skip optimization of functions with alt instructions (PR #95172)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Skip optimization of functions with alt instructions (PR #95172)   Davide Italiano via llvm-commits
• [llvm] [BOLT] Skip optimization of functions with alt instructions (PR #95172)   Davide Italiano via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Ramkumar Ramachandra via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Georg Lehmann via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Ramkumar Ramachandra via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Ramkumar Ramachandra via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Nikita Popov via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [InstCombineCompares] Try to "strengthen" compares based on known bits. (PR #79405)   Mikhail Gudim via llvm-commits
• [llvm] [BOLT] Skip optimization of functions with alt instructions (PR #95172)   Maksim Panchenko via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Paul Kirth via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Paul Kirth via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [mlir] Gratilup/irx (PR #95981)   Gratian Lup via llvm-commits
• [llvm] [mlir] Gratilup/irx (PR #95981)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Nikita Popov via llvm-commits
• [llvm] 3d2bbea - [ProfileData] Clean up validateRecord (#95488)   via llvm-commits
• [llvm] [ProfileData] Clean up validateRecord (PR #95488)   Kazu Hirata via llvm-commits
• [llvm] e5f1639 - [Flang]Fix for changed code at the end of AllocaIP. (#92430)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)   Mats Petersson via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (PR #95983)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (PR #95983)   via llvm-commits
• [llvm] a03d06a - Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (#95519)   via llvm-commits
• [clang] [llvm] Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (PR #95519)   Alexandros Lamprineas via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to a few Interp instructions (PR #95984)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to a few Interp instructions (PR #95984)   via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Adrian Vogelsgesang via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Adrian Vogelsgesang via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Adrian Vogelsgesang via llvm-commits
• [llvm] [memprof] Rename the members of IndexedMemProfData (NFC) (PR #94873)   Teresa Johnson via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [SDAG] Don't transfer !range metadata without noundef to SDAG (PR #95153)   Andreas Jonson via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Adrian Prantl via llvm-commits
• [llvm] [ProfileData] Remove getValueForSite and getNumValueDataForSite (PR #95989)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Remove getValueForSite and getNumValueDataForSite (PR #95989)   via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Thorsten Schütt via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Florian Mayer via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Afanasyev via llvm-commits
• [llvm] [WebAssembly] Treat 'rethrow' as terminator in custom isel (PR #95967)   Derek Schuff via llvm-commits
• [llvm] [ProfileData] Remove getValueForSite and getNumValueDataForSite (PR #95989)   David Li via llvm-commits
• [llvm] 300c41c - [X86] Use 32-bit jump table entries on Windows (#95962)   via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   Arthur Eubanks via llvm-commits
• [llvm] 66df765 - [ProfileData] Remove getValueForSite and getNumValueDataForSite (#95989)   via llvm-commits
• [llvm] [ProfileData] Remove getValueForSite and getNumValueDataForSite (PR #95989)   Kazu Hirata via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Arthur Eubanks via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Arthur Eubanks via llvm-commits
• [llvm] InstrProfiling.cpp: Let lowerIntrinsics() able to insert BBs. (PR #95585)   NAKAMURA Takumi via llvm-commits
• [llvm] InstrProfiling.cpp: Let lowerIntrinsics() able to insert BBs. (PR #95585)   NAKAMURA Takumi via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   David Green via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] 773ee62 - [memprof] Rename the members of IndexedMemProfData (NFC) (#94873)   via llvm-commits
• [llvm] [memprof] Rename the members of IndexedMemProfData (NFC) (PR #94873)   Kazu Hirata via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [X86] Use 32-bit jump table entries on Windows (PR #95962)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [scudo] Minor refactoring of secondary cache test (PR #95995)   via llvm-commits
• [compiler-rt] [scudo] Minor refactoring of secondary cache test (PR #95995)   via llvm-commits
• [compiler-rt] [scudo] Minor refactoring of secondary cache test (PR #95995)   via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Vitaly Buka via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [lld] Move HIP fatbin sections farther away from .text (PR #95949)   Siu Chi Chan via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Jakub Kuderski via llvm-commits
• [lld] Move HIP fatbin sections farther away from .text (PR #95949)   Siu Chi Chan via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Fangrui Song via llvm-commits
• [clang] [llvm] [HLSL][clang] Add elementwise builtins for trig intrinsics (PR #95999)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][clang] Add elementwise builtins for trig intrinsics (PR #95999)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][clang] Add elementwise builtins for trig intrinsics (PR #95999)   via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to a few Interp instructions (PR #95984)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (PR #95983)   Matt Arsenault via llvm-commits
• [llvm] d8b63b6 - AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (#95950)   via llvm-commits
• [llvm] AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (PR #95950)   Matt Arsenault via llvm-commits
• [llvm] [LoopIdiomVectorize] Remove redundant DomTreeUpdates (PR #94681)   Jakub Kuderski via llvm-commits
• [llvm] [LoopIdiomVectorize] Remove redundant DomTreeUpdates (PR #94681)   Jakub Kuderski via llvm-commits
• [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in pow combine (PR #95277)   David Blaikie via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Arthur Eubanks via llvm-commits
• [clang] [llvm] AMDGPU: Remove ds atomic fadd intrinsics (PR #95396)   Matt Arsenault via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [llvm] 12cf0dc - Update ReleaseNotes for MC/DC changes. (#95887)   via llvm-commits
• [clang] [llvm] Update ReleaseNotes for MC/DC changes. (PR #95887)   NAKAMURA Takumi via llvm-commits
• [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in pow combine (PR #95277)   Matt Arsenault via llvm-commits
• [compiler-rt] [libFuzzer] Fix incorrect coverage number in fork mode (PR #82335)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [MemCpyOpt] Forward `memcpy` based on the actual copy memory location. (PR #87190)   via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Philip Reames via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   Francis Visoiu Mistrih via llvm-commits
• [clang] [lldb] [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Greg Clayton via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] f0a76d5 - [gn] port 04a75f54a11f   Nico Weber via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Ellis Hoag via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   Ellis Hoag via llvm-commits
• [llvm] 448bb5c - [SCEV] Add coverage for variants of vscale indexing for EVL vectorized loops   Philip Reames via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Alexander Shaposhnikov via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chandler Carruth via llvm-commits
• [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in pow combine (PR #95277)   David Blaikie via llvm-commits
• [llvm] 139f896 - InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (#95692)   via llvm-commits
• [llvm] InstrProfiling: Split creating Bias offset to getOrCreateBiasVar(Name). NFC. (PR #95692)   NAKAMURA Takumi via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Eli Friedman via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Eli Friedman via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Eli Friedman via llvm-commits
• [llvm] [MemCpyOpt] Forward `memcpy` based on the actual copy memory location. (PR #87190)   via llvm-commits
• [llvm] InstProfiling: Give the name to profc_bias. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Arthur Eubanks via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] 8ea31db - [CodeGenPrepare] Use MapVector to stabilize iteration order   Fangrui Song via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Kyungwoo Lee via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [MIR] Support parsing bfloat immediates in MIR parser. (PR #96010)   Stephen Chou via llvm-commits
• [llvm] a512854 - InstProfiling: Give the name to profc_bias. NFC. (#95587)   via llvm-commits
• [llvm] InstProfiling: Give the name to profc_bias. NFC. (PR #95587)   NAKAMURA Takumi via llvm-commits
• [llvm] [LLVM][MIR] Support parsing bfloat immediates in MIR parser (PR #96010)   Stephen Chou via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Chuanqi Xu via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [compiler-rt] [compiler-rt][AArch64][FMV] Use the hw.optional.arm.caps fast path (PR #95275)   Saagar Jha via llvm-commits
• [compiler-rt] [compiler-rt][AArch64][FMV] Use the hw.optional.arm.caps fast path (PR #95275)   Jon Roelofs via llvm-commits
• [compiler-rt] 0c02811 - fixup! [compiler-rt][AArch64][FMV] Use the hw.optional.arm.caps fast path (#95275)   Jon Roelofs via llvm-commits
• [compiler-rt] [compiler-rt][AArch64][FMV] Use the hw.optional.arm.caps fast path (PR #95275)   Jon Roelofs via llvm-commits
• [compiler-rt] [scudo] Minor refactoring of secondary cache test (PR #95995)   Christopher Ferris via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Chuanqi Xu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] InstrProf: Mark BiasLI as invariant. (PR #95588)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   Freddy Ye via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv, sf, cf, of, zf`. (PR #95910)   Freddy Ye via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Wentao Zhang via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   Yingwei Zheng via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Carl Ritson via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Yingwei Zheng via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Eli Friedman via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv,sf,cf,of,zf` for CCMP/CTEST (PR #95910)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv,sf,cf,of,zf` for CCMP/CTEST (PR #95910)   Shengchen Kan via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] 728fb23 - [X86][MC] Support case insenstive for `dfv,sf,cf,of,zf` for CCMP/CTEST (#95910)   via llvm-commits
• [llvm] [X86][MC] Support case insenstive for `dfv,sf,cf,of,zf` for CCMP/CTEST (PR #95910)   Freddy Ye via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   Trevor Gross via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Pengcheng Wang via llvm-commits
• [llvm] [llvm-c] Provide LLVMGetGEPResultElementType (PR #95693)   Vaivaswatha N via llvm-commits
• [llvm] [NFC][SPARC] Fix typos and style mismatches (PR #96019)   via llvm-commits
• [llvm] [NFC][SPARC] Fix typos and style mismatches (PR #96019)   via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   Ryotaro KASUGA via llvm-commits
• [llvm] 3c8f3b9 - [WebAssembly] Treat 'rethrow' as terminator in custom isel (#95967)   via llvm-commits
• [llvm] [WebAssembly] Treat 'rethrow' as terminator in custom isel (PR #95967)   Heejin Ahn via llvm-commits
• [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Yingwei Zheng via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Hana Dusíková via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Mingming Liu via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Hana Dusíková via llvm-commits
• [compiler-rt] Log errno (or fuchsia equivalent) on map failures (PR #95391)   Mitch Phillips via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Mingming Liu via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Mingming Liu via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Mingming Liu via llvm-commits
• [llvm] 1c9a81b - Fix gdb pretty printers for libSupport   David Blaikie via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add __spirv_ wrapper to the OpAtomicExchange instruction (PR #95961)   Michal Paszkowski via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Yingwei Zheng via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Yingwei Zheng via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Andrew Pinski via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   David Green via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   David Green via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   David Green via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   David Green via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   Mikhail Gudim via llvm-commits
• [llvm] [TargetParser][AArch64] Believe runtime feature detection (PR #95694)   David Green via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   Mikhail Gudim via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Wentao Zhang via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Wu Yingcong via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   via llvm-commits
• [llvm] [llvm-mca] Use llvm::erase_if (NFC) (PR #96029)   Kazu Hirata via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Hana Dusíková via llvm-commits
• [llvm] [llvm-mca] Use llvm::erase_if (NFC) (PR #96029)   via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Wentao Zhang via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Sushant Gokhale via llvm-commits
• [llvm] [SROA] Propagate no-signed-zeros(nsz) fast-math flag on the phi node using function attribute (PR #83381)   Sushant Gokhale via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Pierre van Houtryve via llvm-commits
• [llvm] [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (PR #95770)   Pierre van Houtryve via llvm-commits
• [llvm] cb20d4d - [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (#95770)   via llvm-commits
• [llvm] [NFC][CodeGen] Remove dead ParallelCG.h/.cpp API (PR #95770)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] 6c01011 - [IR] Mark shl constant expression as undesirable (#95940)   via llvm-commits
• [llvm] [IR] Mark shl constant expression as undesirable (PR #95940)   Nikita Popov via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] dd1d2b7 - [llvm][CodeGen] Fix failure in window scheduler caused by phi (#95900)   via llvm-commits
• [llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)   Hua Tian via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Wentao Zhang via llvm-commits
• [clang] [llvm] Split fmv and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [compiler-rt] 7fc975a - Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (#95838)   via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   Fabio D'Urso via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Pierre van Houtryve via llvm-commits
• [compiler-rt] Reland "[scudo] Apply filling when realloc shrinks and re-grows a block in-place" (PR #95838)   LLVM Continuous Integration via llvm-commits
• [llvm] 9cbedd9 - [LangRef] Relax semantics of writeonly / memory(write) (#95238)   via llvm-commits
• [llvm] [LangRef] Relax semantics of writeonly / memory(write) (PR #95238)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Alexandros Lamprineas via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   James Henderson via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   James Henderson via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   James Henderson via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   James Henderson via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add possibility to verify .note section format (PR #90458)   James Henderson via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] bdc7840 - [X86][CodeGen] Share code between CompressEVEX pass and ND2NonND transform, NFCI   Shengchen Kan via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Nikita Popov via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   via llvm-commits
• [flang] [llvm] Adding parsing support for omp loop, target loop directives (PR #93517)   Michael Klemm via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Pierre van Houtryve via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   Nikita Popov via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Nikita Popov via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Nikita Popov via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Nikita Popov via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Nikita Popov via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Nikita Popov via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   via llvm-commits
• [llvm] 0dd4377 - [LICM] Fix dropped metadata (#95221)   via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   Nikita Popov via llvm-commits
• [llvm] [MC/DC][Coverage] Make tvbitmapupdate capable of atomic write (PR #96042)   NAKAMURA Takumi via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Craig Topper via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Craig Topper via llvm-commits
• [llvm] [MC/DC][Coverage] Make tvbitmapupdate capable of atomic write (PR #96042)   via llvm-commits
• [llvm] [LICM] Fix dropped metadata (PR #95221)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Momchil Velikov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Pavel Skripkin via llvm-commits
• [llvm] 0daeed6 - [SPIR-V] Improve implementation of the duplicates tracker's storage (#95958)   via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   Vyacheslav Levytskyy via llvm-commits
• [llvm] f7336b9 - [SPIR-V] Add __spirv_ wrapper to the OpAtomicExchange instruction (#95961)   via llvm-commits
• [llvm] [SPIR-V] Add __spirv_ wrapper to the OpAtomicExchange instruction (PR #95961)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [SPIR-V] Improve implementation of the duplicates tracker's storage (PR #95958)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] 4889add - [X86] Replace (void) with [[maybe_unused]] for some variables unused (or only used in asserts). NFC.   Simon Pilgrim via llvm-commits
• [llvm] cfb4dce - [X86] combineConstantPoolLoads - early-out if the load is not from a constant pool. NFC.   Simon Pilgrim via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Stephen Tozer via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] fold `(a == 1 && b != 0) || (a != 0 && b == 0))` to `(a ==0) != (b == 0)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   Zhijin Zeng via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [DebugInfo][DivRemPairs] Fix missing debug location updates (PR #96045)   Shan Huang via llvm-commits
• [llvm] [DebugInfo][DivRemPairs] Fix missing debug location updates (PR #96045)   via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   Jianjian Guan via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Momchil Velikov via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Sherwood via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Lucas Duarte Prates via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   David Sherwood via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Jeremy Morse via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Simon Pilgrim via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Yingwei Zheng via llvm-commits
• [llvm] 116384a - [NFC][AArch64] Organise extensions by archtecture version (#95898)   via llvm-commits
• [llvm] [NFC][AArch64] Organise extensions by archtecture version (PR #95898)   Lucas Duarte Prates via llvm-commits
• [llvm] [NFC][SPARC] Fix typos and style mismatches (PR #96019)   Sergei Barannikov via llvm-commits
• [llvm] d72b57b - DenseMap: support enum class keys (#95972)   via llvm-commits
• [llvm] DenseMap: support enum class keys (PR #95972)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   Nikita Popov via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] 1a364b4 - [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (#95948)   via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Anton Sidorenko via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   Zhijin Zeng via llvm-commits
• [llvm] [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (PR #74502)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Pengcheng Wang via llvm-commits
• [llvm] [X86] abs i8 - perform as abs i32 if we have access to CMOV (PR #95101)   Simon Pilgrim via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Sander de Smalen via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Nikita Popov via llvm-commits
• [llvm] [TTI][AArch64] Add preferFixedIfEqualToScalable hook (PR #95818)   Sjoerd Meijer via llvm-commits
• [llvm] 4c8ce5d - [InstCombine] Preserve all flags in select of gep fold   Nikita Popov via llvm-commits
• [llvm] [llvm-mca] Use llvm::erase_if (NFC) (PR #96029)   Peter Waller via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Danial Klimkin via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Momchil Velikov via llvm-commits
• [llvm] 6467b49 - [InstCombine] Preserve all flags in phi of gep fold   Nikita Popov via llvm-commits
• [llvm] 9e6625d - [InstCombine] Preserve all gep flags in another select of gep fold   Nikita Popov via llvm-commits
• [llvm] 44cff96 - [X86] computeKnownBitsForPMADDWD/PMADDUBSW - tidyup line overflow by moving extensions to the multiply stage. NFC.   Simon Pilgrim via llvm-commits
• [llvm] 6efba06 - [InstCombine] Preserve all gep flags in dependent IV fold   Nikita Popov via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Sander de Smalen via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Sander de Smalen via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] 8072222 - [InstCombine] Preserve all gep flags in gep of select fold   Nikita Popov via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [LLVM] Extend setModuleFlag interface. (PR #86031)   David Green via llvm-commits
• [llvm] 2a11690 - [InstCombine] Preserve all gep flags when emitting offset   Nikita Popov via llvm-commits
• [llvm] AMDGPU: Handle legal v2f16/v2bf16 atomicrmw fadd for global/flat (PR #95394)   Jay Foad via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Pengcheng Wang via llvm-commits
• [llvm] 5dde495 - [AArch64] NFC: Precommit some tests for SME   Sander de Smalen via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   Danial Klimkin via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Stephen Tozer via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   Danial Klimkin via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   via llvm-commits
• [llvm] [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (PR #74502)   Paul Walker via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   Stephen Tozer via llvm-commits
• [llvm] [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (PR #96056)   Luke Lau via llvm-commits
• [llvm] [LLVM] Add option to store Parent-pointer in ilist_node_base (PR #94224)   Danial Klimkin via llvm-commits
• [llvm] [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (PR #96056)   via llvm-commits
• [llvm] [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (PR #96056)   Luke Lau via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   Danial Klimkin via llvm-commits
• [llvm] Fix getParent / getNodeBaseParent to return pointer to const (#94224) (PR #96053)   Danial Klimkin via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   via llvm-commits
• [lld] [LLD] [COFF] Don't crash on an empty -entry: argument (PR #96058)   Martin Storsjö via llvm-commits
• [lld] [LLD] [COFF] Don't crash on an empty -entry: argument (PR #96058)   via llvm-commits
• [llvm] [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (PR #96056)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   LLVM Continuous Integration via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Stephen Tozer via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96060)   Garvit Gupta via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96060)   via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96060)   Garvit Gupta via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [clang] [llvm] [FMV] Rectify incomplete ExtensionInfo entries in TargetParser. (PR #89106)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [FMV] Rectify incomplete ExtensionInfo entries in TargetParser. (PR #89106)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Fanbo Meng via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Fanbo Meng via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Fanbo Meng via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96060)   Pengcheng Wang via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   Zhijin Zeng via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] d26808c - [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (#96056)   via llvm-commits
• [llvm] [RISCV] Move RISCVInsertVSETVLI::coalesceVSETVLIs back to before insertReadVL (PR #96056)   Luke Lau via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   Sjoerd Meijer via llvm-commits
• [llvm] Handle #dbg_values in SROA. (PR #94070)   Stephen Tozer via llvm-commits
• [llvm] 60984f5 - [InstCombine] Preserve all gep flags in gep of exact div fold   Nikita Popov via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Nikita Popov via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   via llvm-commits
• [llvm] [SLP] Cache users-scalar pairs during tree vectorization (PR #96065)   Maurice Heumann via llvm-commits
• [llvm] [SLP] Cache users-scalar pairs during tree vectorization (PR #96065)   via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [llvm] 0d524bc - [llvm-mca] Use llvm::erase_if (NFC) (#96029)   via llvm-commits
• [llvm] [llvm-mca] Use llvm::erase_if (NFC) (PR #96029)   Kazu Hirata via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Zibi Sarbinowski via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Peter Smith via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Paul Walker via llvm-commits
• [llvm] 93831c7 - [AArch64] Let patterns for NEON instructions check runtime mode. (#95560)   via llvm-commits
• [llvm] [AArch64] Let patterns for NEON instructions check runtime mode. (PR #95560)   Sander de Smalen via llvm-commits
• [llvm] [APInt] Assert correct values in APInt constructor (PR #80309)   Vladimir Radosavljevic via llvm-commits
• [llvm] ca423a2 - [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (#95803)   via llvm-commits
• [llvm] [AArch64] Avoid using NEON BSL for streaming[-compatible] functions (PR #95803)   Sander de Smalen via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Tomas Matheson via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Zibi Sarbinowski via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)   James Henderson via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Zibi Sarbinowski via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [InstCombine] Simplify select using KnownBits of condition (PR #95923)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Zibi Sarbinowski via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Zibi Sarbinowski via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Shilei Tian via llvm-commits
• [llvm] [SROA] Propagate no-signed-zeros(nsz) fast-math flag on the phi node using function attribute (PR #83381)   Matt Arsenault via llvm-commits
• [llvm] 4b0c078 - [RISCV][test] Pre-commit test case where ConstantHoisting fails to trigger   Alex Bradbury via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM-Reduce] - Distinct Metadata Reduction (PR #96072)   Robert Barinov via llvm-commits
• [llvm] [LLVM-Reduce] - Distinct Metadata Reduction (PR #96072)   via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   via llvm-commits
• [llvm] [llvm] Do not use Console API if the output isn't a console device (PR #90230)   Kacper Michajłow via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Alex Bradbury via llvm-commits
• [llvm] 84c60bb - [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (#95983)   via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (PR #95983)   Joe Nash via llvm-commits
• [llvm] e5b0c21 - [AMDGPU] Add IsSingle to a few Interp instructions (#95984)   via llvm-commits
• [llvm] [AMDGPU] Add IsSingle to a few Interp instructions (PR #95984)   Joe Nash via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   via llvm-commits
• [llvm] [AVR] Drop std::size from ArrayRef (NFC) (PR #96076)   Kazu Hirata via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   via llvm-commits
• [llvm] Let ArrayRef infer the array size (NFC) (PR #96076)   Kazu Hirata via llvm-commits
• [llvm] Let ArrayRef infer the array size (NFC) (PR #96076)   Kazu Hirata via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [AVR] Let ArrayRef infer the array size (NFC) (PR #96076)   Kazu Hirata via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Craig Topper via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Craig Topper via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative imm constants (PR #95825)   via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [llvm] f450408 - [GISel][RISCV]Implement indirect parameter passing (#95429)   via llvm-commits
• [llvm] [GISel][RISCV]Implement indirect parameter passing (PR #95429)   Gábor Spaits via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Jon Chesterfield via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Florian Hahn via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Jon Chesterfield via llvm-commits
• [llvm] [AVR] Let ArrayRef infer the array size (NFC) (PR #96076)   via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Jon Chesterfield via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Jon Chesterfield via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Jon Chesterfield via llvm-commits
• [llvm] 3be7312 - [LV] Add more masked store cost tests with different masks.   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Paschalis Mpeis via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] AMDGPU/gfx12: Minor documentation update (PR #96079)   Nicolai Hähnle via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] AMDGPU/gfx12: Minor documentation update (PR #96079)   via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   via llvm-commits
• [llvm] AMDGPU/gfx12: Minor documentation update (PR #96079)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] edd2d7c - [NFC][SPARC] Fix typos and style mismatches   via llvm-commits
• [llvm] [NFC][SPARC] Fix typos and style mismatches (PR #96019)   via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Thorsten Schütt via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [llvm] [ARM] CMSE security mitigation on function arguments and returned values (PR #89944)   Oliver Stannard via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Chen Zheng via llvm-commits
• [llvm] 4a70981 - AMDGPU/gfx12: Minor documentation update (#96079)   via llvm-commits
• [llvm] AMDGPU/gfx12: Minor documentation update (PR #96079)   Nicolai Hähnle via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [llvm] [LLVM][MIR] Support parsing bfloat immediates in MIR parser (PR #96010)   Stephen Chou via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Alexander Yermolovich via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Alexander Yermolovich via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   via llvm-commits
• [llvm] e773f53 - [AVR] Let ArrayRef infer the array size (NFC) (#96076)   via llvm-commits
• [llvm] [AVR] Let ArrayRef infer the array size (NFC) (PR #96076)   Kazu Hirata via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Philip Reames via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] [AVR] Let ArrayRef infer the array size (NFC) (PR #96076)   LLVM Continuous Integration via llvm-commits
• [llvm] Recommit "[Inliner] Propagate callee argument memory access attributes before inlining" (2nd Try) (PR #95888)   Nikita Popov via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Chris B via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Philip Reames via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Philip Reames via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Nikita Popov via llvm-commits
• [llvm] [ORC] Preserve order of constructors with same priority (PR #95532)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [clang] [llvm] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Philip Reames via llvm-commits
• [llvm] cb76896 - [SCEVExpander] Recognize urem idiom during expansion (#96005)   via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [SCEVExpander] Recognize urem idiom during expansion (PR #96005)   Philip Reames via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)   via llvm-commits
• [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)   Durgadoss R via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [llvm] [SCEV] Use context sensative reasoning in howFarToZero (PR #94525)   Philip Reames via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)   Durgadoss R via llvm-commits
• [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Tomas Matheson via llvm-commits
• [llvm] b2b1ee7 - [X86] Regenerate vector-truncate-combine.ll to check entire code sequence   Simon Pilgrim via llvm-commits
• [llvm] 2a57a08 - [PowerPC] Regenerate p8altivec-shuffles-pred.ll with update_llc_test_checks script   Simon Pilgrim via llvm-commits
• [llvm] [SCEV] Use context sensitive reasoning in howFarToZero (PR #94525)   Yingwei Zheng via llvm-commits
• [llvm] [SCEV] Use context sensitive reasoning in howFarToZero (PR #94525)   Yingwei Zheng via llvm-commits
• [llvm] [DebugInfo][DivRemPairs] Fix missing debug location updates (PR #96045)   Stephen Tozer via llvm-commits
• [llvm] [InstCombine] Swap out range metadata to range attribute for arm_mve_pred_v2i (PR #94847)   Nikita Popov via llvm-commits
• [llvm] 04cd069 - [SCEV] Use context sensitive reasoning in howFarToZero (#94525)   via llvm-commits
• [llvm] [SCEV] Use context sensitive reasoning in howFarToZero (PR #94525)   Philip Reames via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [llvm] b9702bb - [LV] Consider insts feeding interleave group pointers free.   Florian Hahn via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Chris B via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   via llvm-commits
• [llvm] 34a2889 - [InstCombine] Swap out range metadata to range attribute for arm_mve_pred_v2i (#94847)   via llvm-commits
• [llvm] [InstCombine] Swap out range metadata to range attribute for arm_mve_pred_v2i (PR #94847)   Andreas Jonson via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [llvm] [RISCV][NFC] Cleanup SCR1 sched model (PR #96088)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV][NFC] Cleanup SCR1 sched model (PR #96088)   via llvm-commits
• [llvm] [RISCV][NFC] Add UnsupportedSched<F|D|A> multiclasses (PR #95948)   Anton Sidorenko via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)   via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Yingwei Zheng via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   via llvm-commits
• [llvm] [RISCV][NFC] Cleanup SCR1 sched model (PR #96088)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Shilei Tian via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Shilei Tian via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Shilei Tian via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Shilei Tian via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Stephen Tozer via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Stephen Tozer via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Chris B via llvm-commits
• [llvm] 7d92609 - [gn/mac] Fix isysroot flag when building compiler-rt   Nico Weber via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [PowerPC] Remove extraneous ArrayRef (NFC) (PR #96092)   Kazu Hirata via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [PowerPC] Remove extraneous ArrayRef (NFC) (PR #96092)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] 58d7a6e - [GlobalMerge] Use MapVector to stabilize iteration order   Fangrui Song via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Kevin P. Neal via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Nikita Popov via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Sean Perry via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Sean Perry via llvm-commits
• [llvm] [PPC]Optimize zeroing accumulator and spilling instructions into simple instructions (PR #96094)   zhijian lin via llvm-commits
• [llvm] [PPC]Optimize zeroing accumulator and spilling instructions into simple instructions (PR #96094)   via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Nikita Popov via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Nikita Popov via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Nikita Popov via llvm-commits
• [llvm] [M68k] Introduce more MOVI cases (PR #90817)   John Paul Adrian Glaubitz via llvm-commits
• [llvm] fb17bbc - [DenseMap] Update combineHashValue   via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   Julian Brown via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Florian Hahn via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Justin Bogner via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Justin Bogner via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Justin Bogner via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Justin Bogner via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Justin Bogner via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][clang] Add elementwise builtins for trig intrinsics (PR #95999)   Justin Bogner via llvm-commits
• [llvm] 24335e4 - [RLEV] Add coverage for expansion of umin EVL idiom   Philip Reames via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   Kiran Chandramohan via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] d857061 - [DirectX][DXIL] Update DXIL Op TableGen Specification (#95807)   via llvm-commits
• [llvm] [DirectX][DXIL] Update DXIL Op TableGen Specification (PR #95807)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Chris Lattner via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Helena Kotas via llvm-commits
• [llvm] c6ed828 - [ADT] Fix incorrect const parent ptr type in ilist (#96059)   via llvm-commits
• [llvm] [ADT] Fix incorrect const parent ptr type in ilist (PR #96059)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Helena Kotas via llvm-commits
• [llvm] [SCEVExpander] Support hoisting udiv X, Y where Y is non-zero (PR #96102)   Philip Reames via llvm-commits
• [llvm] [SCEVExpander] Support hoisting udiv X, Y where Y is non-zero (PR #96102)   via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] 936bc9b - [DirectX] Add trig intrinsics and link them with DXIL backend (#95968)   via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] [SCEVExpander] Support hoisting udiv X, Y where Y is non-zero (PR #96102)   Nikita Popov via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Helena Kotas via llvm-commits
• [llvm] [SCEVExpander] Support hoisting udiv X, Y where Y is non-zero (PR #96102)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] c008647 - [VPlan] Introduce isHeaderMask helper (NFCI).   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Helena Kotas via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] f991ebb - [Support] Add llvm::xxh3_128bits (#95863)   via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Add trig intrinsics and link them with DXIL backend (PR #95968)   Farzon Lotfi via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Eli Friedman via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Nikita Popov via llvm-commits
• [llvm] [SLPVectorizer] Support SLPVectorizer cases of tan across all backends (PR #95517)   Farzon Lotfi via llvm-commits
• [llvm] [SLPVectorizer] Support SLPVectorizer cases of tan across all backends (PR #95517)   Alexey Bataev via llvm-commits
• [llvm] [PowerPC] Remove extraneous ArrayRef (NFC) (PR #96092)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   Fangrui Song via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Strength reduce mul by 2^N - 2^M (PR #88983)   Philip Reames via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   Fangrui Song via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Eli Friedman via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   Fangrui Song via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Strength reduce mul by 2^N - 2^M (PR #88983)   Philip Reames via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)   Mikhail Gudim via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Hana Dusíková via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Eli Friedman via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Eli Friedman via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Eli Friedman via llvm-commits
• [llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)   Zaara Syeda via llvm-commits
• [llvm] [PPC] Add DwarfRegAlias for VSRPair (PR #95837)   Zaara Syeda via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [PPC] Add DwarfRegAlias for VSRPair (PR #95837)   Zaara Syeda via llvm-commits
• [llvm] 0a5292e - [PowerPC] Remove extraneous ArrayRef (NFC) (#96092)   via llvm-commits
• [llvm] [PowerPC] Remove extraneous ArrayRef (NFC) (PR #96092)   Kazu Hirata via llvm-commits
• [llvm] 61e62ce - [llvm-cov] let text mode divider honor --show-branch-summary, --show-region-summary etc (#96016)   via llvm-commits
• [llvm] [llvm-cov] let text mode divider honor `--show-branch-summary` `--show-region-summary` etc (PR #96016)   Wentao Zhang via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [PowerPC] Remove extraneous ArrayRef (NFC) (PR #96092)   LLVM Continuous Integration via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Joshua Cranmer via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] [NVPTX] cap param alignment at 128 (max supported by ptx) (PR #96117)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] cap param alignment at 128 (max supported by ptx) (PR #96117)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] 86eb6bf - [LowerTypeTests] Use MapVector to stabilize iteration order   Fangrui Song via llvm-commits
• [compiler-rt] cae6d45 - [CompilerRT] Add support for numerical sanitizer (#94322)   via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Fangrui Song via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   via llvm-commits
• [llvm] 89e8e63 - [Attributor] Stabilize llvm.assume output   Fangrui Song via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   Kiran Chandramohan via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Eli Friedman via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] c025bd1 - [TableGen,GlobalISel] Use MapVector to stabilize iteration order   Fangrui Song via llvm-commits
• [llvm] Add support for "grid_constant" in NVPTXLowerArgs. (PR #96125)   Akshay Deodhar via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [llvm] Add support for "grid_constant" in NVPTXLowerArgs. (PR #96125)   via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   via llvm-commits
• [llvm] Basic support for "grid_constant" in NVPTXLowerArgs. (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] [X86] abs i8 - perform as abs i32 if we have access to CMOV (PR #95101)   via llvm-commits
• [llvm] 34313eb - [JITLink] Ensure Edges order is deterministic   Fangrui Song via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   Jonas Devlieghere via llvm-commits
• [llvm] Basic support for "grid_constant" in NVPTXLowerArgs. (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] f8f4235 - [JITLink] Use MapVector to stabilize iteration order   Fangrui Song via llvm-commits
• [llvm] [DFAJumpThreading] Rewrite the way paths are enumerated (PR #96127)   Usman Nadeem via llvm-commits
• [llvm] [DFAJumpThreading] Rewrite the way paths are enumerated (PR #96127)   via llvm-commits
• [llvm] [SCEVExpander] Support hoisting udiv X, Y where Y is non-zero (PR #96102)   Eli Friedman via llvm-commits
• [llvm] Basic support for "grid_constant" in NVPTXLowerArgs. (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Wu Yingcong via llvm-commits
• [llvm] [PPC] Add DwarfRegAlias for VSRPair (PR #95837)   Chen Zheng via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Chris B via llvm-commits
• [llvm] [LSR] Change the computing method of Cost.ImmCost and rewrite equality icmp (PR #96044)   Zhijin Zeng via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] ad79a14 - [ADT] Update hash function of uint64_t for DenseMap (#95734)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Dhruv Chawla via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Dhruv Chawla via llvm-commits
• [compiler-rt] [compiler-rt] [profile] Add value profile in profile data without-libc (PR #95639)   dong jianqiang via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Dhruv Chawla via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Luke Lau via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Michael Maitland via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Pengcheng Wang via llvm-commits
• [llvm] [PowerPC] Make verifier happy after peephole on MMA COPYs (PR #94321)   Chen Zheng via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Sam Clegg via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Pengcheng Wang via llvm-commits
• [llvm] [LLVM][runtimes] Prepopulate `LLVM_BUILTIN_TARGETS` with runtimes values (PR #95554)   Joseph Huber via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Chuanqi Xu via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Shilei Tian via llvm-commits
• [llvm] 480a788 - [PowerPC] Make verifier happy after peephole on MMA COPYs (#94321)   via llvm-commits
• [llvm] [PowerPC] Make verifier happy after peephole on MMA COPYs (PR #94321)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Make verifier happy after peephole on MMA COPYs (PR #94321)   LLVM Continuous Integration via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Serge Pavlov via llvm-commits
• [llvm] [GenericDomTreeConstruction] Use SmallVector (NFC) (PR #96138)   Kazu Hirata via llvm-commits
• [llvm] [GenericDomTreeConstruction] Use SmallVector (NFC) (PR #96138)   via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Chuanqi Xu via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   via llvm-commits
• [llvm] 5ef02d9 - [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (#93481)   via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Strength reduce mul by 2^N - 2^M (PR #88983)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Valery Pykhtin via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   LLVM Continuous Integration via llvm-commits
• [llvm] ac02bf7 - [NFC] Fix header level in LangRef   Qiu Chaofan via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   YunQiang Su via llvm-commits
• [llvm] 394e321 - Reland "[CVP] Check whether the default case is reachable (#79993)" (#96089)   via llvm-commits
• [llvm] Reland "[CVP] Check whether the default case is reachable (#79993)" (PR #96089)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   LLVM Continuous Integration via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   YunQiang Su via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   via llvm-commits
• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Wu Yingcong via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   Jianjian Guan via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   Jessica Paquette via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Piyou Chen via llvm-commits
• [llvm] 930dd3f - [LLVM] Extend setModuleFlag interface. (#86031)   via llvm-commits
• [llvm] [LLVM] Extend setModuleFlag interface. (PR #86031)   Daniel Kiss via llvm-commits
• [llvm] [LLVM] Extend setModuleFlag interface. (PR #86031)   LLVM Continuous Integration via llvm-commits
• [llvm] 76d3ab2 - [IR] Remove support for shl constant expressions (#96037)   via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   Nikita Popov via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Fangrui Song via llvm-commits
• [llvm] Fix bazel build past abd95342f0b94e140b36ac954b8f8c29b1393861 (PR #96143)   Danial Klimkin via llvm-commits
• [llvm] Fix bazel build past abd95342f0b94e140b36ac954b8f8c29b1393861 (PR #96143)   Danial Klimkin via llvm-commits
• [llvm] [bolt][Docs] fix missing option in cmake of stage3 in OptimizingClang.md (PR #93684)   via llvm-commits
• [llvm] [LSR] Optimize lsr-term-fold if the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] [LSR] Extend lsr-term-fold to multiple exits loop and support the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] [LSR] Extend lsr-term-fold to multiple exits loop and support the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Björn Pettersson via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [GenericDomTreeConstruction] Use SmallVector (NFC) (PR #96138)   Nikita Popov via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [llvm] [SLP] Cache user-scalar pairs during tree vectorization (PR #96065)   Maurice Heumann via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)   via llvm-commits
• [llvm] [LSR] Extend lsr-term-fold to multiple exits loop and support the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [compiler-rt] ef83c25 - [nsan] Fix style issue   via llvm-commits
• [clang-tools-extra] [compiler-rt] [nsan] Fix style issue (PR #96142)   Fangrui Song via llvm-commits
• [clang-tools-extra] [compiler-rt] [nsan] Fix style issue (PR #96142)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Nathan Gauër via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [compiler-rt] 7cf84d3 - mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (#95702)   via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Adam Paszke via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Adam Paszke via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Adam Paszke via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Adam Paszke via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Adam Paszke via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Kai Luo via llvm-commits
• [llvm] [LSR] Extend lsr-term-fold to multiple exits loop and support the operand of condition is PHINode (PR #96048)   Zhijin Zeng via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   James Henderson via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   James Henderson via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   James Henderson via llvm-commits
• [llvm] [IR] Remove support for shl constant expressions (PR #96037)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][CMake] Set LANG to "C" before linker detection (fix issue #62634). (PR #95913)   Carlo Bramini via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   Nikita Popov via llvm-commits
• [lld] acf675b - [LLD] [MinGW] Interpret an empty -entry option as no entry point (#96055)   via llvm-commits
• [lld] [LLD] [MinGW] Interpret an empty -entry option as no entry point (PR #96055)   Martin Storsjö via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [llvm] Fix unassigned add handling in aarch64 (PR #86636)   Yusuke Abe via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Matt Arsenault via llvm-commits
• [flang] [llvm] Adding parsing support for omp loop, target loop directives (PR #93517)   Anchu Rajendran S via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   Kiran Chandramohan via llvm-commits
• [llvm] [SimplifyCFG] Don't limit the number of simultaneous forwards from switch condition (PR #95932)   via llvm-commits
• [llvm] [SLP] NFC. Reduce redundant assignment. (PR #96149)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP] NFC. Reduce redundant assignment. (PR #96149)   via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Diana Picus via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Diana Picus via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Diana Picus via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Jay Foad via llvm-commits
• [llvm] Fix unassigned add handling in aarch64 (PR #86636)   Yusuke Abe via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   Dmitriy Chestnykh via llvm-commits
• [llvm] [MachineLICM] Workaround - apply RegMasks conservatively (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Jay Foad via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] 46beeaa - [MC] Remove SectionKind from MCSection (#96067)   via llvm-commits
• [llvm] [MC] Remove SectionKind from MCSection (PR #96067)   via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [llvm] f0897ea - [MachineLICM] Work-around Incomplete RegUnits (#95926)   via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Pierre van Houtryve via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   David Green via llvm-commits
• [llvm] 81e8f01 - [AMDGPU] Fix typo "GXF" in check prefix   Jay Foad via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] 2ccfa93 - [AMDGPU] Tweak comment to fix warning from filecheck_lint.py   Jay Foad via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   James Henderson via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   James Henderson via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   James Henderson via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   James Henderson via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   James Henderson via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   Kiran Chandramohan via llvm-commits
• [llvm] 70748dc - [AMDGPU] Fix GFX90A/GFX940 check prefix typos   Jay Foad via llvm-commits
• [llvm] d594d9f - [AMDGPU] Add a RUN line to test the OSABI-PAL-ERR prefix   Jay Foad via llvm-commits
• [llvm] [MachineLICM] Work-around Incomplete RegUnits (PR #95926)   Martin Storsjö via llvm-commits
• [llvm] 78ff617 - [ARM] CMSE security mitigation on function arguments and returned values (#89944)   via llvm-commits
• [llvm] [ARM] CMSE security mitigation on function arguments and returned values (PR #89944)   Victor Campos via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] 94fdfc1 - [AMDGPU] Add ALL prefix to all RUN lines for better diagnostics   Jay Foad via llvm-commits
• [llvm] 80f8814 - [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (#94226)   via llvm-commits
• [polly] 80f8814 - [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (#94226)   via llvm-commits
• [clang] [llvm] [polly] [LLVM] Add InsertPosition union-type to remove overloads of Instruction-creation (PR #94226)   Stephen Tozer via llvm-commits
• [llvm] [MC] Eliminate two symbol-related hash maps (PR #95464)   via llvm-commits
• [llvm] 919c547 - [X86] Fix indention in X86InstrArithmetic.td, NFCI   Shengchen Kan via llvm-commits
• [llvm] c1a7c5a - [MC] Eliminate two symbol-related hash maps (#95464)   via llvm-commits
• [llvm] [MC] Eliminate two symbol-related hash maps (PR #95464)   via llvm-commits
• [llvm] [AMDGPU] Fix and enable NONGFX90A check prefix (PR #96152)   Jay Foad via llvm-commits
• [llvm] [llvm-objcopy] Add change-section-lma *+/-offset (PR #95431)   Eleanor Bonnici via llvm-commits
• [llvm] [AMDGPU] Fix and enable NONGFX90A check prefix (PR #96152)   via llvm-commits
• [llvm] [AMDGPU] Fix and enable NONGFX90A check prefix (PR #96152)   Jay Foad via llvm-commits
• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)   via llvm-commits
• [llvm] ffc51b9 - [LV] Remove loads from null from pr73894.ll test.   Florian Hahn via llvm-commits
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• [llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)   Matt Arsenault via llvm-commits
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• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Christudasan Devadasan via llvm-commits
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• [llvm] 6012de2 - [ValueTracking] Support gep nuw in isKnownNonZero()   Nikita Popov via llvm-commits
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• [llvm] Fix bazel build past e2296d8295516e9991cd6ca99ba193fbd232b6da (PR #96166)   Danial Klimkin via llvm-commits
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• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
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• [clang] [llvm] [PAC][ELF][AArch64] Encode signed GOT flag in PAuth core info (PR #96159)   Daniil Kovalev via llvm-commits
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• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [llvm] [MC][DWARF][NFC] Drop CIEKey map (PR #96075)   Alexis Engelke via llvm-commits
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• [clang] [llvm] [PAC][ELF][AArch64] Encode signed GOT flag in PAuth core info (PR #96159)   via llvm-commits
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• [llvm] 84428da - [MC] Fix compilation   Alexis Engelke via llvm-commits
• [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT (PR #96164)   Daniil Kovalev via llvm-commits
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• [llvm] Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (PR #96172)   via llvm-commits
• [llvm] Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (PR #96172)   via llvm-commits
• [llvm] Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (PR #96172)   via llvm-commits
• [llvm] 90779fd - [AMDGPU] Preserve chain when selecting llvm.amdgcn.pops.exiting.wave.id (#96167)   via llvm-commits
• [llvm] [AMDGPU] Preserve chain when selecting llvm.amdgcn.pops.exiting.wave.id (PR #96167)   Jay Foad via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96060)   Garvit Gupta via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)   Jay Foad via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Simon Pilgrim via llvm-commits
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• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
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• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Nikita Popov via llvm-commits
• [clang] [llvm] [PassManager] Remove some unnecessary includes (NFC) (PR #96175)   Nikita Popov via llvm-commits
• [clang] [llvm] [PassManager] Remove some unnecessary includes (NFC) (PR #96175)   via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Simon Pilgrim via llvm-commits
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• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Nikita Popov via llvm-commits
• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Chuanqi Xu via llvm-commits
• [llvm] [ValueTracking] Infer relationship for the select with ICmp (PR #66668)   via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Aaron Ballman via llvm-commits
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• [llvm] [offload][cmake] always define pythonize_bool macro (PR #96028)   Joseph Huber via llvm-commits
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• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   Martin Storsjö via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Vyacheslav Levytskyy via llvm-commits
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• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   via llvm-commits
• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Matt Arsenault via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Pierre van Houtryve via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Vyacheslav Levytskyy via llvm-commits
• [llvm] be339fd - [SLP] NFC. Reduce redundant assignment. (#96149)   via llvm-commits
• [llvm] [SLP] NFC. Reduce redundant assignment. (PR #96149)   Han-Kuan Chen via llvm-commits
• [llvm] Fix unassigned add handling in aarch64 (PR #86636)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Fix unassigned add handling in aarch64 (PR #86636)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
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• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Alexandros Lamprineas via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   via llvm-commits
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• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Ivan Kosarev via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
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• [clang] [llvm] [Clang][ARM][AArch64] Alway emit protection attributes for functions. (PR #82819)   Tomas Matheson via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (PR #96172)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)   Jay Foad via llvm-commits
• [llvm] [ADT] DenseMapInfo<unsigned long>::getHashValue - avoid MSVC out of bounds shift warning (PR #96173)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Ivan Kosarev via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
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• [llvm] [VPlan] Model middle block via VPIRBasicBlock. (PR #95816)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] 7f09aa9 - [SCEV] Transfer gep nusw and nuw flags   Nikita Popov via llvm-commits
• [clang] [llvm] [PassManager] Remove some unnecessary includes (NFC) (PR #96175)   Nikita Popov via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Mel Chen via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Fabian Ritter via llvm-commits
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• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
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• [llvm] b6c9dcc - [X86][CodeGen] Not emit mr_ND if rr_ND is commutable   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Aaron Ballman via llvm-commits
• [llvm] [NFC][AMDGPU] Do not flush after printing every instruction (PR #95237)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (PR #95932)   via llvm-commits
• [llvm] [SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (PR #95932)   via llvm-commits
• [llvm] [SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (PR #95932)   via llvm-commits
• [llvm] [SimplifyCFG] Forward indirect switch condition value if it can help fold the PHI (PR #95932)   via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)   via llvm-commits
• [llvm] [APInt] Assert correct values in APInt constructor (PR #80309)   Nikita Popov via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   Nikita Popov via llvm-commits
• [llvm] 33c9331 - [AMDGPU] Precommit a test for llvm.amdgcn.pops.exiting.wave.id   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix unwanted LICM/CSE of llvm.amdgcn.pops.exiting.wave.id (PR #96190)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix unwanted LICM/CSE of llvm.amdgcn.pops.exiting.wave.id (PR #96190)   via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   Fabio D'Urso via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support constant hoisting of immediate store values (PR #96073)   Craig Topper via llvm-commits
• [llvm] 290a939 - [SCEV] Handle nusw/nuw gep flags for addrecs   Nikita Popov via llvm-commits
• [llvm] ace069d - [DebugInfo][TailCallElim] Drop the debug location of AccRecInstrNew (#95742)   via llvm-commits
• [llvm] [DebugInfo][TailCallElim] Drop the debug location of AccRecInstrNew (PR #95742)   Shan Huang via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   Louis Dionne via llvm-commits
• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   Louis Dionne via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Fabian Ritter via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Louis Dionne via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [clang] [lld] [llvm] [PassManager] Remove some unnecessary includes (NFC) (PR #96175)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)   LLVM Continuous Integration via llvm-commits
• [clang] [lld] [llvm] [RISCV] Make M imply Zmmul (PR #95070)   Craig Topper via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Kyungwoo Lee via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Kyungwoo Lee via llvm-commits
• [llvm] [CGData] Outlined Hash Tree (PR #89792)   Kyungwoo Lee via llvm-commits
• [llvm] [AMDGPU] MCExpr printing helper with KnownBits support (PR #95951)   Janek van Oirschot via llvm-commits
• [llvm] fa6d38d - [AArch64][TargetParser] Split FMV and extensions (#92882)   via llvm-commits
• [clang] [llvm] [AArch64][TargetParser] Split FMV and extensions (PR #92882)   Tomas Matheson via llvm-commits
• [llvm] 2ae6889 - [SPIRV] Add trig function lowering (#95973)   via llvm-commits
• [llvm] [SPIRV] Add trig function lowering (PR #95973)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Sander de Smalen via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Sander de Smalen via llvm-commits
• [llvm] [llvm-readobj][COFF] Add JSON Output Style (PR #95074)   Miguel A. Arroyo via llvm-commits
• [llvm] [llvm-readobj][COFF] Add `--coff-output-style` flag (PR #95074)   Miguel A. Arroyo via llvm-commits
• [llvm] [AArch64][SVE] optimisation for unary SVE store intrinsics with no active lanes (PR #95793)   via llvm-commits
• [llvm] 3e55ac9 - [RISCV] Strength reduce mul by 2^N - 2^M (#88983)   via llvm-commits
• [llvm] [RISCV] Strength reduce mul by 2^N - 2^M (PR #88983)   Philip Reames via llvm-commits
• [llvm] [llvm-readobj][COFF] Add `--coff-output-style` flag (PR #95074)   Miguel A. Arroyo via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Fabian Ritter via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   via llvm-commits
• [llvm] [llvm-readobj][COFF] Add `--coff-output-style` flag (PR #95074)   Miguel A. Arroyo via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] 67226ba - [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (#91862)   via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Alexandre Ganea via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   via llvm-commits
• [llvm] [TableGen][Docs] Clarify `TokCode` definition. (PR #96201)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Defer forming x0, x0 vsetvlis until after insertion (PR #89089)   Luke Lau via llvm-commits
• [llvm] [RISCV] Defer forming x0, x0 vsetvlis until after insertion (PR #89089)   Luke Lau via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt] [libtsan] fix fstat{, 64} interceptors on glibc (PR #75578)   Miod Vallat via llvm-commits
• [compiler-rt] [compiler-rt] [libtsan] fix fstat{, 64} interceptors on glibc (PR #75578)   Miod Vallat via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [llvm] [RISCV] Defer forming x0, x0 vsetvlis until after insertion (PR #89089)   Luke Lau via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Derek Schuff via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [llvm] d4bfc4a - [RISCV][NFC] Cleanup SCR1 sched model (#96088)   via llvm-commits
• [llvm] [RISCV][NFC] Cleanup SCR1 sched model (PR #96088)   Anton Sidorenko via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Derek Schuff via llvm-commits
• [llvm] bed2eb6 - [GenericDomTreeConstruction] Use SmallVector (NFC) (#96138)   via llvm-commits
• [llvm] [GenericDomTreeConstruction] Use SmallVector (NFC) (PR #96138)   Kazu Hirata via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Tomas Matheson via llvm-commits
• [llvm] [IR][LangRef] Add partial reduction add intrinsic (PR #94499)   via llvm-commits
• [llvm] 898b8a4 - [PPC] Add DwarfRegAlias for VSRPair (#95837)   via llvm-commits
• [llvm] [PPC] Add DwarfRegAlias for VSRPair (PR #95837)   Zaara Syeda via llvm-commits
• [llvm] 037a9a7 - [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (#96007)   via llvm-commits
• [clang] [llvm] [llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (PR #96007)   Jon Roelofs via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Nikita Popov via llvm-commits
• [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs/Zalrsc builtins (PR #94578)   Alex Bradbury via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Paul Kirth via llvm-commits
• [lld] 49ae2dc - [PassManager] Remove some unnecessary includes (NFC) (#96175)   via llvm-commits
• [clang] [lld] [llvm] [PassManager] Remove some unnecessary includes (NFC) (PR #96175)   Nikita Popov via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Alexander Shaposhnikov via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Michael Maitland via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   Anshil Gandhi via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Kai Luo via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   Nikita Popov via llvm-commits
• [clang] [llvm] [AArch64] Merge duplicate extension information. (PR #92319)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [AArch64] Merge duplicate extension information. (PR #92319)   Alexandros Lamprineas via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [compiler-rt] [CompilerRT] Add numerical sanitizer (PR #94322)   Paul Kirth via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Kai Luo via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Paul Walker via llvm-commits
• [llvm] 8e0cd73 - [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (#96081)   via llvm-commits
• [llvm] [AArch64] Consider runtime mode when deciding to use SVE for fixed-length vectors. (PR #96081)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [IR] Move RepeatedPass into separate header (NFC) (PR #96211)   Nikita Popov via llvm-commits
• [llvm] [IR] Move RepeatedPass into separate header (NFC) (PR #96211)   via llvm-commits
• [llvm] [GenericDomTreeConstruction] Use SmallVector (NFC) (PR #96138)   Jakub Kuderski via llvm-commits
• [llvm] [IR] Move RepeatedPass into separate header (NFC) (PR #96211)   Arthur Eubanks via llvm-commits
• [llvm] c07be08 - [LV] Add tail folding test with scalarized store and wide header mask.   Florian Hahn via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] 242cc20 - Recommit "[VPlan] First step towards VPlan cost modeling. (#92555)"   Florian Hahn via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [IR] Move RepeatedPass into separate header (NFC) (PR #96211)   Nikita Popov via llvm-commits
• [llvm] [IR] Move RepeatedPass into separate header (NFC) (PR #96211)   Nikita Popov via llvm-commits
• [llvm] [IR] Remove RepeatedPass (PR #96211)   Nikita Popov via llvm-commits
• [llvm] [IR] Remove RepeatedPass (PR #96211)   Nikita Popov via llvm-commits
• [llvm] [IR] Remove RepeatedPass (PR #96211)   Florian Hahn via llvm-commits
• [lld] [LLD][ELF] Do not emit __start/__stop for empty sections (PR #96213)   Andrew Ng via llvm-commits
• [llvm] [IR] Remove RepeatedPass (PR #96211)   Arthur Eubanks via llvm-commits
• [lld] [LLD][ELF] Do not emit __start/__stop for empty sections (PR #96213)   via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Jan Voung via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Kevin P. Neal via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [lld] afb3f7e - [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (#80169)   via llvm-commits
• [lld] [lld][WebAssembly] Handle stub symbol dependencies when an explicit import name is used (PR #80169)   Sam Clegg via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Alex MacLean via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Vigneshwar Jayakumar via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [clang] [llvm] [CLANG][LLVM][AArch64]SME2.1 intrinsics for MOVAZ tile to 2/4 vectors (PR #88710)   Amara Emerson via llvm-commits
• [clang] [llvm] [CLANG][LLVM][AArch64]Add SME2.1 intrinsics for MOVAZ array to vector (PR #88901)   Amara Emerson via llvm-commits
• [clang] [llvm] [CLANG][LLVM][AArch64]Add SME2.1 intrinsics for MOVAZ tile to vector,… (PR #88499)   Amara Emerson via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   Caslyn Tonelli via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   Anshil Gandhi via llvm-commits
• [llvm] [SCEV] Append disjoint flag when mapping an Or instruction (PR #96208)   Anshil Gandhi via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Fangrui Song via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Yingwei Zheng via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   Akshay Deodhar via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Amir Ayupov via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] 6cea404 - [IR] Remove RepeatedPass (#96211)   via llvm-commits
• [llvm] [IR] Remove RepeatedPass (PR #96211)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] DXIL: Use correct type ID when writing ValueAsMetadata. (PR #94337)   Chris B via llvm-commits
• [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)   via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)   via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] 8367030 - [BranchFolder] Fix missing debug info with tail merging (#94715)   via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] 8d9db94 - Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (#95482)   via llvm-commits
• [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #95482)   Mingming Liu via llvm-commits
• [llvm] [BranchFolder] Fix missing debug info with tail merging (PR #94715)   Alan Zhao via llvm-commits
• [llvm] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   Nikita Popov via llvm-commits
• [llvm] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   via llvm-commits
• [llvm] [polly] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   Nikita Popov via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Daniel Thornburgh via llvm-commits
• [llvm] [DenseMap] Update combineHashValue (PR #95970)   Kazu Hirata via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with declared resolvees. (PR #96220)   Alexandros Lamprineas via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with declared resolvees. (PR #96220)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Sam Clegg via llvm-commits
• [llvm] [Support] Add llvm::xxh3_128bits (PR #95863)   Brendan Duke via llvm-commits
• [llvm] 01ce74f - Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (#96172)   via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with undefined resolvees. (PR #96220)   Alexandros Lamprineas via llvm-commits
• [llvm] Revert "[DebugInfo][BPF] Add 'annotations' field for DIBasicType & DI… (PR #96172)   via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with undefined resolvees. (PR #96220)   Jon Roelofs via llvm-commits
• [llvm] [X86][CodeGen] Add base trig intrinsic lowerings (PR #96222)   Farzon Lotfi via llvm-commits
• [llvm] [X86][CodeGen] Add base trig intrinsic lowerings (PR #96222)   via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)   Serge Pavlov via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [clang] Implement function pointer signing and authenticated function calls (PR #93906)   Ahmed Bougacha via llvm-commits
• [llvm] Fixed AddressSpaceCast in CodeExtractor (PR #96230)   Eric Wright via llvm-commits
• [llvm] Fixed AddressSpaceCast in CodeExtractor (PR #96230)   via llvm-commits
• [llvm] Fixed AddressSpaceCast in CodeExtractor (PR #96230)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [polly] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   Arthur Eubanks via llvm-commits
• [llvm] eea150c - [VPlan] Include IV phi and backedge cost in VPlan cost computation.   Florian Hahn via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [llvm] [polly] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   Florian Hahn via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Anshil Gandhi via llvm-commits
• [llvm] edf2d0a - [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (#96004)   via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Michael Bedy via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)   Ahmed Bougacha via llvm-commits
• [compiler-rt] [compiler-rt] Remove redundant checks. (PR #95753)   Florian Mayer via llvm-commits
• [llvm] [LoopIdiomVectorize] Remove redundant DomTreeUpdates (PR #94681)   Min-Yih Hsu via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Florian Mayer via llvm-commits
• [compiler-rt] 49001d5 - [ubsan] Display correct runtime messages for negative _BitInt (#93612)   via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Florian Mayer via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [compiler-rt] 7a49c90 - [NFC] fix incorrect #endif comment (#95991)   via llvm-commits
• [compiler-rt] [NFC] fix incorrect #endif comment (PR #95991)   Florian Mayer via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Instrumentation] Add numerical sanitizer (PR #85916)   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Alexander Shaposhnikov via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Paul Kirth via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Alexander Shaposhnikov via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   Amara Emerson via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   Alexey Lapshin via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Florian Mayer via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   David Li via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [CodeGen] Do not emit TRAP for `unreachable` after `@llvm.trap` (PR #94570)   Igor Kudrin via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   via llvm-commits
• [clang] [compiler-rt] Revert "[ubsan] Display correct runtime messages for negative _BitInt" (PR #96239)   via llvm-commits
• [clang] [compiler-rt] Revert "[ubsan] Display correct runtime messages for negative _BitInt" (PR #96239)   via llvm-commits
• [clang] [compiler-rt] Revert "[ubsan] Display correct runtime messages for negative _BitInt" (PR #96239)   via llvm-commits
• [llvm] [AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (PR #96038)   Stanislav Mekhanoshin via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Sriraman Tallam via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Sriraman Tallam via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Fangrui Song via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   Paul Kirth via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   Fangrui Song via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   Fangrui Song via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fangrui Song via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Jessica Clarke via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Jessica Clarke via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Fix broken JSON output with --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #96243)   Greg Clayton via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #96243)   Greg Clayton via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #96243)   Greg Clayton via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   James Y Knight via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   via llvm-commits
• [compiler-rt] e908320 - Revert "mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (#95702)"   NAKAMURA Takumi via llvm-commits
• [llvm] 0ee2af5 - mcdc.ll: Relax.   NAKAMURA Takumi via llvm-commits
• [llvm] [RISCV]Add support for resolving encoding conflicts among vendor specific CSRs (PR #96174)   Craig Topper via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   NAKAMURA Takumi via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] [MC/DC][Coverage] Make tvbitmapupdate capable of atomic write (PR #96042)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)   Joshua Batista via llvm-commits
• [clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)   Joshua Batista via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   Raghu Maddhipatla via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   Jon Roelofs via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   via llvm-commits
• [compiler-rt] mmapForContinuousMode: Align Linux's impl to __APPLE__'s more. NFC. (PR #95702)   Paul Kirth via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] Speed up branch relaxation from O(n^2) to O(n) (PR #96250)   Daniel Hoekwater via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [lld] [LLD][ELF] Do not emit __start/__stop for empty sections (PR #96213)   Fangrui Song via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Alexander Richardson via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Stanislav Mekhanoshin via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Sam Clegg via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [compiler-rt] 2fe8498 - mmapForContinuousMode: Redo #95702: Align Linux's impl to __APPLE__'s a little.   NAKAMURA Takumi via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Enforce parameter order in f16 call, flipped call unit tests (PR #96258)   Akshay Deodhar via llvm-commits
• [llvm] Enforce parameter order in f16 call, flipped call unit tests (PR #96258)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Arthur Eubanks via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [lld] [lld][WebAssembly] Allow `--trace-symbol` to work with symbols with custom import names (PR #96119)   Heejin Ahn via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [llvm] e1e5ed5 - Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (#95461)   via llvm-commits
• [llvm] Update ModuleSummaryIndexBitcodeReader::makeCallList reserve amount (PR #95461)   Jan Voung via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   Kazu Hirata via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Vitaly Buka via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   via llvm-commits
• [llvm] 1fafa32 - [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (#96188)   via llvm-commits
• [llvm] [SCEV] Avoid unnecessary call to getExitingBlock() in computeExitLimit() (PR #96188)   via llvm-commits
• [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #96264)   via llvm-commits
• [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #96264)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)   via llvm-commits
• [lld] [lld][InstrProf] Profile guided function order (PR #96268)   Ellis Hoag via llvm-commits
• [lld] [lld][InstrProf] Profile guided function order (PR #96268)   via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [ObjCARC] Add variations of intrinsics that do not touch reference counts (PR #94919)   via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates (PR #95825)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   via llvm-commits
• [llvm] abaaa48 - [PowerPC] fix frameaddress error when there is dynamic alloca call, NFC   Chen Zheng via llvm-commits
• [llvm] e1c03dd - [PowerPC] use r1 as the frame pointer when there is dynamic alloca   Chen Zheng via llvm-commits
• [llvm] [X86][CodeGen] Add base trig intrinsic lowerings (PR #96222)   Farzon Lotfi via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Chuanqi Xu via llvm-commits
• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   via llvm-commits
• [llvm] 7625465 - [RISCV] Make M imply Zmmul (#95070)   via llvm-commits
• [clang] [lld] [llvm] [RISCV] Make M imply Zmmul (PR #95070)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Piyou Chen via llvm-commits
• [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)   Alex Rønne Petersen via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   Chen Zheng via llvm-commits
• [lld] f3c4dae - [ELF] -no-pie: don't optimize addq R_X86_64_REX_GOTPCRELX when !isInt<32>(va)   Fangrui Song via llvm-commits
• [llvm] 8988148 - Intrinsic: introduce minimumnum and maximumnum (#93841)   via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   YunQiang Su via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Piyou Chen via llvm-commits
• [llvm] 826bde5 - Adding parsing support for omp loop, target loop directives (#93517)   via llvm-commits
• [flang] [llvm] Adding parsing support for omp loop, target loop directives (PR #93517)   Anchu Rajendran S via llvm-commits
• [llvm] [TableGen][Docs] Clarify `TokCode` definition. (PR #96201)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   via llvm-commits
• [llvm] [AMDGPU][GFX12] Add support for new block ls instructions (PR #96273)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU][GFX12] Add support for new block ls instructions (PR #96273)   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Arthur Eubanks via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Arthur Eubanks via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   Shilei Tian via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   via llvm-commits
• [llvm] a2cd846 - [TableGen][Docs] Clarify `TokCode` definition. (#96201)   via llvm-commits
• [llvm] [TableGen][Docs] Clarify `TokCode` definition. (PR #96201)   Piotr Fusik via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [compiler-rt] e674e73 - [compiler-rt] Fix build breakage (#96235)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix build breakage (PR #96235)   Alexander Shaposhnikov via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] - Handle dependencies in `createTarget` (PR #93977)   Pranav Bhandarkar via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] - Handle dependencies in `createTarget` (PR #93977)   Pranav Bhandarkar via llvm-commits
• [llvm] [ProfileData] Drop an unused parameter from addValueData (PR #96233)   David Li via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] - Handle dependencies in `createTarget` (PR #93977)   Pranav Bhandarkar via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   Ryotaro KASUGA via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   Ryotaro KASUGA via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Mircea Trofin via llvm-commits
• [llvm] [ProfileData] Teach addValueData to honor parameter Site (PR #96233)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Teach addValueData to honor parameter Site (PR #96233)   Kazu Hirata via llvm-commits
• [llvm] beba2e7 - [ProfileData] Teach addValueData to honor parameter Site (#96233)   via llvm-commits
• [llvm] [ProfileData] Teach addValueData to honor parameter Site (PR #96233)   Kazu Hirata via llvm-commits
• [llvm] Replace hard coded opcodes from #93841 with regexes to be more flexible. (PR #96277)   via llvm-commits
• [llvm] 225d8fc - Replace hard coded opcodes from #93841 with regexes to be more flexible. (#96277)   via llvm-commits
• [llvm] Replace hard coded opcodes from #93841 with regexes to be more flexible. (PR #96277)   via llvm-commits
• [llvm] Replace hard coded opcodes from #93841 with regexes to be more flexible. (PR #96277)   via llvm-commits
• [llvm] Replace hard coded opcodes from #93841 with regexes to be more flexible. (PR #96277)   via llvm-commits
• [llvm] 9f71a6b - [DWARFLinker] Preserve DWARF discriminators while linking (#96124)   via llvm-commits
• [llvm] [DWARFLinker] Preserve DWARF discriminators while linking (PR #96124)   David Tellenbach via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Serge Pavlov via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   David Green via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   Tomas Matheson via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   Tomas Matheson via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   Tomas Matheson via llvm-commits
• [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   David Green via llvm-commits
• [llvm] [dsymutil] Move discriminator test to be executed with Arm support only (PR #96280)   David Tellenbach via llvm-commits
• [llvm] 8472862 - [dsymutil] Move discriminator test to be executed with Arm support only (#96280)   via llvm-commits
• [llvm] [dsymutil] Move discriminator test to be executed with Arm support only (PR #96280)   David Tellenbach via llvm-commits
• [llvm] [dsymutil] Move discriminator test to be executed with Arm support only (PR #96280)   via llvm-commits
• [llvm] Replace hard coded opcodes from #93841 with regexes to be more flexible. (PR #96277)   YunQiang Su via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Nikita Popov via llvm-commits
• [llvm] [WIP][X86] lowerBuildVectorAsBroadcast - don't convert constant vectors to broadcasts on AVX512VL targets (PR #73509)   via llvm-commits
• [llvm] f2f1845 - Revert "Intrinsic: introduce minimumnum and maximumnum (#93841)"   Nikita Popov via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   Daniel Kiss via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   Nikita Popov via llvm-commits
• [polly] 36c6632 - [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (#96219)   via llvm-commits
• [llvm] [polly] [IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (PR #96219)   Nikita Popov via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Chuanqi Xu via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   via llvm-commits
• [llvm] 874dcae - [Serialization] Use stable hash functions   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   James Henderson via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   Phoebe Wang via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   James Henderson via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Pengcheng Wang via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Thorsten Schütt via llvm-commits
• [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs/Zalrsc builtins (PR #94578)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)   via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)   Matt Arsenault via llvm-commits
• [llvm] db03d9d - Recommit "[Inliner] Propagate callee argument memory access attributes before inlining" (2nd Try)   Noah Goldstein via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] Recommit "[Inliner] Propagate callee argument memory access attributes before inlining" (2nd Try) (PR #95888)   via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix and enable NONGFX90A check prefix (PR #96152)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)   Matt Arsenault via llvm-commits
• [llvm] b635d69 - [NFC] Fix laod -> load typos. NFC   David Green via llvm-commits
• [llvm] 09cdbd2 - [AArch64] Use AArch64ISD::UADDLP over aarch64_neon_uaddlp. NFC   David Green via llvm-commits
• [llvm] c6a257f - [AArch64] Fix || Add brackets for || inside of assert   David Green via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (PR #96185)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V]: Improve pattern matching to recognize an aggregate constant to be a constant (PR #96286)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V]: Improve pattern matching to recognize an aggregate constant to be a constant (PR #96286)   via llvm-commits
• [llvm] [SPIR-V]: Improve pattern matching to recognize a composite constant to be a constant (PR #96286)   Vyacheslav Levytskyy via llvm-commits
• [llvm] 7c946f0 - [GlobalOpt] Don't resolve aliased ifuncs with undefined resolvees. (#96220)   via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with undefined resolvees. (PR #96220)   Alexandros Lamprineas via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] [ObjCARC] Add variations of intrinsics that do not touch reference counts (PR #94919)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   David Green via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Matt Arsenault via llvm-commits
• [llvm] Enable logf128 constant folding for AArch64 (PR #96287)   Matthew Devereau via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] Enable logf128 constant folding for AArch64 (PR #96287)   Matthew Devereau via llvm-commits
• [llvm] d59a4ca - [RISCV] Add Syntacore SCR3 processor definition (#95953)   via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR3 processor definition (PR #95953)   Anton Sidorenko via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   Ryotaro KASUGA via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Thorsten Schütt via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   via llvm-commits
• [llvm] [MachinePipeliner] Fix constraints aren't considered in certain cases (PR #95356)   Ryotaro KASUGA via llvm-commits
• [llvm] ef16f7a - [CodeGenPrepare] Add missing `static` decl on `matchIncrement()`; NFC   Noah Goldstein via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   Matt Arsenault via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   Matt Arsenault via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Thorsten Schütt via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Set total VGPRs to 1536 for gfx12 (PR #96272)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Matt Arsenault via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   Chen Zheng via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Thorsten Schütt via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] e887624 - [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (#95528)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fp128 and i128 fptosi/fptoui handling. (PR #95528)   David Green via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Matt Arsenault via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Matt Arsenault via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (PR #96004)   Jay Foad via llvm-commits
• [llvm] b23bd52 - [PassInstrumentation] Use try_emplace() (NFC)   Nikita Popov via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [llvm] [WIP][X86] lowerBuildVectorAsBroadcast - don't convert constant vectors to broadcasts on AVX512VL targets (PR #73509)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][GFX12] Add support for new block ls instructions (PR #96273)   Jay Foad via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Matt Arsenault via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AArch64] Add ability to list extensions enabled for a target (PR #95805)   Lucas Duarte Prates via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Qiu Chaofan via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Qiu Chaofan via llvm-commits
• [llvm] [AArch64] Remove superfluous sxtw in peephole opt (PR #96293)   David Green via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Remove superfluous sxtw in peephole opt (PR #96293)   via llvm-commits
• [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)   Qiu Chaofan via llvm-commits
• [llvm] 57c083e - [X86] combine-pmadd.ll - add tests for concatenations of pmaddwd/pmaddubsw subvectors   Simon Pilgrim via llvm-commits
• [llvm] 53a059c - [PassInstrumentation] Use DenseMap to store class->pass map (NFC)   Nikita Popov via llvm-commits
• [llvm] cba4dfd - [RegAllocFast] Use unsigned for operand indices   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] b1ec1a2 - [AArch64] NFCI: More sensible implementation of isLegalMaskedGatherScatter.   Sander de Smalen via llvm-commits
• [llvm] 0ae6cfc - [RegAllocFast] Handle single-vdef instrs faster (#96284)   via llvm-commits
• [llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)   Alexis Engelke via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer. (PR #96139)   Thorsten Schütt via llvm-commits
• [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)   Jay Foad via llvm-commits
• [llvm] [RegAlloc] Don't call always-true ShouldAllocClass (PR #96296)   Alexis Engelke via llvm-commits
• [llvm] [RegAlloc] Don't call always-true ShouldAllocClass (PR #96296)   via llvm-commits
• [llvm] [RegAlloc] Don't call always-true ShouldAllocClass (PR #96296)   Matt Arsenault via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   YunQiang Su via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] f12655a - [HLSLResource] Don't include Metadata.h (NFC)   Nikita Popov via llvm-commits
• [llvm] [LSR] Recognize vscale-relative immediates (PR #88124)   Graham Hunter via llvm-commits
• [llvm] [GlobalISel][AArch6] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch6] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [LSR] Recognize vscale-relative immediates (PR #88124)   Graham Hunter via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] 739a960 - [RegAlloc] Don't call always-true ShouldAllocClass (#96296)   via llvm-commits
• [llvm] [RegAlloc] Don't call always-true ShouldAllocClass (PR #96296)   Alexis Engelke via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)   Lawrence Benson via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   YunQiang Su via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   Yingwei Zheng via llvm-commits
• [llvm] Enable logf128 constant folding for AArch64 (PR #96287)   Matthew Devereau via llvm-commits
• [llvm] Enable logf128 constant folding for AArch64 (PR #96287)   via llvm-commits
• [llvm] f1075a3 - [FileSystem] Avoid <stack> include (NFC)   Nikita Popov via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Update checking method of loop-carried phi in window scheduler (PR #96288)   Hua Tian via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Yingwei Zheng via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   Nikita Popov via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [llvm] c026024 - AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (#95929)   via llvm-commits
• [llvm] AMDGPU: Legalize v2f16 atomicrmw fadd for buffer fat pointers (PR #95929)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle legal v2bf16 atomicrmw fadd for gfx12 (PR #95930)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch6] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Anton Sidorenko via llvm-commits
• [llvm] [LLVM-Reduce] - Distinct Metadata Reduction (PR #96072)   Robert Barinov via llvm-commits
• [llvm] 8cf3988 - [X86] combineConcatVectorOps - add pmaddwd/pmaddubsw handling   Simon Pilgrim via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Add reverse directive (PR #92916)   Michael Kruse via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Add reverse directive (PR #92916)   Michael Kruse via llvm-commits
• [compiler-rt] 138ea7d - Revert "[ubsan] Display correct runtime messages for negative _BitInt" (#96239)   via llvm-commits
• [clang] [compiler-rt] Revert "[ubsan] Display correct runtime messages for negative _BitInt" (PR #96239)   via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   David Sherwood via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   David Sherwood via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Danial Klimkin via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   via llvm-commits
• [llvm] [GlobalISel][AArch6] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV] Add scheduling model for Syntacore SCR3 (PR #95427)   Michael Maitland via llvm-commits
• [llvm] AMDGPU: Handle legal v2bf16 atomicrmw fadd for gfx12 (PR #95930)   Matt Arsenault via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   Thorsten Schütt via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Harald van Dijk via llvm-commits
• [llvm] AMDGPU: Handle legal v2bf16 atomicrmw fadd for gfx12 (PR #95930)   Matt Arsenault via llvm-commits
• [llvm] [LLVM-Reduce] - Distinct Metadata Reduction (PR #96072)   Robert Barinov via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Michael Maitland via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   YunQiang Su via llvm-commits
• [llvm] df86fb0 - [llvm-objdump] enable file-headers option of llvm-objdump for XCOFF object files (#96104)   via llvm-commits
• [llvm] enable file-headers option of llvm-objdump for XCOFF object files (PR #96104)   zhijian lin via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] 8bb3b14 - [TensorSpec] Avoid JSON.h include (NFC)   Nikita Popov via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   via llvm-commits
• [llvm] 747f9da - [AArch64] NFC: Precommit new RUN lines to test sme-vectorize.ll   Sander de Smalen via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)   Durgadoss R via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   Louis Dionne via llvm-commits
• [llvm] 2dea00b - [X86] combine-pmadd.ll - add demandedelts tests for pmaddwd/pmaddubsw   Simon Pilgrim via llvm-commits
• [llvm] 0be0ab9 - [X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::VPMADDUBSW handling   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Louis Dionne via llvm-commits
• [llvm] [Offload] Fix using old deprecated CUDA root variable (PR #96307)   Joseph Huber via llvm-commits
• [llvm] [Offload] Fix using old deprecated CUDA root variable (PR #96307)   via llvm-commits
• [llvm] [llvm] terminate namespace with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [llvm] 30299b8 - [CommandLine] Avoid ManagedStatic.h include (NFC)   Nikita Popov via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Add NVPTX intrinsics for TMA copies (PR #95289)   Durgadoss R via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Thorsten Schütt via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Thorsten Schütt via llvm-commits
• [lld] [LLD][ELF] Do not emit __start/__stop for empty sections (PR #96213)   Andrew Ng via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   via llvm-commits
• [llvm] [FPEnv] Add strictfp attribute to the FP environment manipulation intrinsics (PR #96093)   Kevin P. Neal via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Thorsten Schütt via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Freeze can be avoided if we propagate NUW or NSW (PR #96261)   via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Thorsten Schütt via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Harald van Dijk via llvm-commits
• [clang] [compiler-rt] [compiler-rt] Realtime Sanitizer: Introduce Realtime Sanitizer (RTSan) backend (PR #92460)   Chris Apple via llvm-commits
• [llvm] 60bdcc0 - [GraphWriter] Add missing ManagedStatic.h include (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [clang] [lld] [llvm] [RISCV] Make M imply Zmmul (PR #95070)   Philip Reames via llvm-commits
• [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)   YAMAMOTO Takashi via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)   via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [libunwind] [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)   David Spickett via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   Paul Walker via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Mircea Trofin via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Mircea Trofin via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Mircea Trofin via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Mircea Trofin via llvm-commits
• [llvm] [Inliner] Handle CGSCC changes from #94815 (PR #96274)   Mircea Trofin via llvm-commits
• [llvm] 4e6835d - [AArch64] Use ccmn to compare negative immediates between -1 and -31 (#95825)   via llvm-commits
• [llvm] [AArch64] Use ccmn to compare negative immediates between -1 and -31 (PR #95825)   David Green via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [llvm] [InstCombine] Remove one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (PR #90509)   via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [InstCombine] Remove one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (PR #90509)   via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [llvm-readobj][ELF] Implement JSON output for --dynamic-table (PR #95976)   Fred Grim via llvm-commits
• [llvm] [Offload] Fix using old deprecated CUDA root variable (PR #96307)   Shilei Tian via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Joseph Huber via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Sven Verdoolaege via llvm-commits
• [llvm] [CodeGen] Clear InitUndef pass new register cache between pass runs (PR #90967)   Joe Faulls via llvm-commits
• [llvm] f581d19 - [AArch64] AArch64AsmParser::tryParseImmRange - don't directly dereference pointers from dyn_cast   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Jay Foad via llvm-commits
• [llvm] [Offload] Fix using old deprecated CUDA root variable (PR #96307)   Joseph Huber via llvm-commits
• [llvm] [Offload] Fix using old deprecated CUDA root variable (PR #96307)   Joseph Huber via llvm-commits
• [llvm] [SystemZ] Address issue with supper large stack frames on achitecture SystemZ (PR #96318)   Zibi Sarbinowski via llvm-commits
• [llvm] [SystemZ] Address issue with supper large stack frames on achitecture SystemZ (PR #96318)   via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   Fabio D'Urso via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] - Handle dependencies in `createTarget` (PR #93977)   Pranav Bhandarkar via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)   David Sherwood via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   via llvm-commits
• [llvm] [IR] Lazily initialize the class to pass name mapping (NFC) (PR #96321)   Nikita Popov via llvm-commits
• [llvm] [IR] Lazily initialize the class to pass name mapping (NFC) (PR #96321)   via llvm-commits
• [llvm] [PassManager] Add pretty stack frames (PR #96078)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   David Spickett via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [NVPTX] Implement variadic functions using IR lowering (PR #96015)   Joseph Huber via llvm-commits
• [llvm] [SystemZ] Address issue with supper large stack frames (PR #96318)   Zibi Sarbinowski via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)   via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Hassnaa Hamdi via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Mircea Trofin via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Mircea Trofin via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   David Blaikie via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Mircea Trofin via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Mircea Trofin via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Yingwei Zheng via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [SPIR-V]: Improve pattern matching to recognize a composite constant to be a constant (PR #96286)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)   Serge Pavlov via llvm-commits
• [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)   via llvm-commits
• [llvm] [InstCombine] Add freeze for lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #96324)   via llvm-commits
• [llvm] [InstCombine] Add freeze for lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #96324)   via llvm-commits
• [lld] [lld][InstrProf] Profile guided function order (PR #96268)   Ellis Hoag via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #96299)   Thorsten Schütt via llvm-commits
• [llvm] [BOLT][DWARF] Refactor updateDWARFObjectAddressRanges (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] f9fc6f6 - [SLP] Remove dead initialization noticed by static analyser. NFC.   Simon Pilgrim via llvm-commits
• [llvm] 2615e69 - [IR] AutoUpgrade.cpp - don't directly dereference pointers from dyn_cast   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   Philip Reames via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Patrick O'Neill via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   Kai Nacke via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   James Y Knight via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   James Y Knight via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Refactor writing GOFF records (PR #93855)   Kai Nacke via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [llvm] [bazel] Port #95942 (PR #96334)   Keith Smiley via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [llvm] [bazel] Port #95942 (PR #96334)   Keith Smiley via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Greg Clayton via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Chuanqi Xu via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   Florian Mayer via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Matt Arsenault via llvm-commits
• [clang] [llvm] [DirectX] Move ResourceClass enum into DXILABI. NFC (PR #96335)   Justin Bogner via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [DirectX] Move ResourceClass enum into DXILABI. NFC (PR #96335)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] Speed up branch relaxation from O(n^2) to O(n) (PR #96250)   Daniel Hoekwater via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)   Matt Arsenault via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [clang] [llvm] [DirectX] Move ResourceClass enum into DXILABI. NFC (PR #96335)   Damyan Pepper via llvm-commits
• [clang] [llvm] [DirectX] Move ResourceClass enum into DXILABI. NFC (PR #96335)   David Peixotto via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   Paul Walker via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   Paul Walker via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   Paul Walker via llvm-commits
• [llvm] [AArch64] Check for streaming mode in HasSME* features. (PR #96302)   Paul Walker via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Alexis Engelke via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   Matt Arsenault via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Alexis Engelke via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Matt Arsenault via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] [BOLT][DWARF] Refactor legacy ranges writers (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] f4cf15d - [RegAllocFast] Replace UsedInInstr with vector (#96323)   via llvm-commits
• [llvm] [RegAllocFast] Replace UsedInInstr with vector (PR #96323)   Alexis Engelke via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Matt Arsenault via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   James Y Knight via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   Thorsten Schütt via llvm-commits
• [compiler-rt] e9af6ee - Enable building 16 bit floating point builtins in apple platforms if supported by the compiler (#84192)   via llvm-commits
• [compiler-rt] Enable building 16 bit floating point builtins in apple platforms if supported by the compiler (PR #84192)   William Moses via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] [X86][MC] Drop optional from LowerMachineOperand (PR #96338)   Alexis Engelke via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Joseph Huber via llvm-commits
• [llvm] [X86][MC] Drop optional from LowerMachineOperand (PR #96338)   via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Joseph Huber via llvm-commits
• [llvm] [llvm] terminate namespace with closing comment (PR #94917)   Aiden Grossman via llvm-commits
• [clang] [llvm] [clang] Implement pointer authentication for C++ virtual functions, v-tables, and VTTs (PR #94056)   Ahmed Bougacha via llvm-commits
• [llvm] af478c8 - [offload][runtimes] Forward user-provided system configuration (#96303)   via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Paul Walker via llvm-commits
• [clang] [llvm] Remove mmx 3dnow (PR #96246)   James Y Knight via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   Philip Reames via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Hassnaa Hamdi via llvm-commits
• [llvm] Revert "[bazel] Port #95942" (PR #96340)   Keith Smiley via llvm-commits
• [llvm] Revert "[bazel] Port #95942" (PR #96340)   Keith Smiley via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [lldb] [llvm] Add support for using foreign type units in .debug_names. (PR #87740)   Pavel Labath via llvm-commits
• [llvm] [bazel] Fix mpfr_wrapper build (PR #96341)   Keith Smiley via llvm-commits
• [llvm] [LoopIdiomVectorize] Remove redundant DomTreeUpdates (PR #94681)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Remove redundant DomTreeUpdates (PR #94681)   Min-Yih Hsu via llvm-commits
• [llvm] [bazel] Fix mpfr_wrapper build (PR #96341)   via llvm-commits
• [llvm] [bazel] Fix mpfr_wrapper build (PR #96341)   Keith Smiley via llvm-commits
• [llvm] [LoopIdiomVectorize][NFC] Factoring out the part that handles vectorization strategy (PR #94682)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize][NFC] Factoring out the part that handles vectorization strategy (PR #94682)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][LoopIdiomVectorize] Support VP intrinsics in LoopIdiomVectorize (PR #94082)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][LoopIdiomVectorize] Support VP intrinsics in LoopIdiomVectorize (PR #94082)   Min-Yih Hsu via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Joe Nash via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Matt Arsenault via llvm-commits
• [llvm] fbf0ca6 - [AMDGPU][GFX12] Add support for new block ls instructions (#96273)   via llvm-commits
• [llvm] [AMDGPU][GFX12] Add support for new block ls instructions (PR #96273)   Mariusz Sikora via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Michael Kruse via llvm-commits
• [llvm] [GlobalOpt] Don't resolve aliased ifuncs with undefined resolvees. (PR #96220)   LLVM Continuous Integration via llvm-commits
• [llvm] [offload][runtimes] Forward user-provided system configuration. (PR #96303)   Joseph Huber via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [mlgo] Support composite AOT-ed models (PR #96276)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   via llvm-commits
• [llvm] [llvm] terminate namespace with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [lld] [ELF] Make start/stop symbols retain associated discardable output sections (PR #96343)   Fangrui Song via llvm-commits
• [lld] [ELF] Make start/stop symbols retain associated discardable output sections (PR #96343)   via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [lld] [ELF] Make start/stop symbols retain associated discardable output sections (PR #96343)   Fangrui Song via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Alex MacLean via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Alex MacLean via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Alex MacLean via llvm-commits
• [llvm] [RISCV][POC] Recursive search for mul expansion (PR #96327)   Thorsten Schütt via llvm-commits
• [llvm] [MC][AArch64][NFC] Re-enable a test (PR #96344)   Igor Kudrin via llvm-commits
• [llvm] [MC][AArch64][NFC] Re-enable a test (PR #96344)   via llvm-commits
• [lld] [LLD][ELF] Do not emit __start/__stop for empty sections (PR #96213)   Fangrui Song via llvm-commits
• [llvm] [MC][AArch64][NFC] Re-enable a test (PR #96344)   Fangrui Song via llvm-commits
• [llvm] 39048b6 - [DirectX] Move ResourceClass enum into DXILABI. NFC (#96335)   via llvm-commits
• [clang] [llvm] [DirectX] Move ResourceClass enum into DXILABI. NFC (PR #96335)   Justin Bogner via llvm-commits
• [llvm] [SystemZ] Address issue with supper large stack frames (PR #96318)   Zibi Sarbinowski via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Fangrui Song via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [llvm] [X86][MC] Drop optional from LowerMachineOperand (PR #96338)   Fangrui Song via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Add 64b support to LLDB's minidump file builder. (PR #95312)   Jacob Lalonde via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] f1f3c34 - Revert "Recommit "[VPlan] First step towards VPlan cost modeling. (#92555)""   Florian Hahn via llvm-commits
• [llvm] [llvm] terminate namespace with closing comment (PR #94917)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Remove one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (PR #90509)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Florian Hahn via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   Nathan Sidwell via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   Matt Arsenault via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Fangrui Song via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] [SCEV] Support addrec in right hand side in howManyLessThans (PR #92560)   via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Stanislav Mekhanoshin via llvm-commits
• [llvm] 5ece35d - Add the 'initializes' attribute langref and support (#84803)   via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   Florian Mayer via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   Haopeng Liu via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Nikita Popov via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   Florian Mayer via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   via llvm-commits
• [llvm] [BOLT][DWARF] Refactor legacy ranges writers (PR #96006)   Alexander Yermolovich via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [BOLT] Do not reject irreversible branches during disassembly (PR #95572)   Nathan Sidwell via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   LLVM Continuous Integration via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   LLVM Continuous Integration via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   LLVM Continuous Integration via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [lld] lld: add support for NOCROSSREFS(_TO) (PR #95714)   Pavel Skripkin via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize to cmn instead of cmp (PR #96349)   via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize to cmn instead of cmp (PR #96349)   via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits
• [llvm] [llvm] format and terminate namespaces with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [clang] [lldb] [llvm] [BOLT][DWARF] Refactor legacy ranges writers (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits
• [llvm] [llvm] format and terminate namespaces with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [llvm] [BOLT][DWARF] Refactor legacy ranges writers (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] [llvm] format and terminate namespaces with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Consider streaming mode in TTI interfaces for vectorization. (PR #96305)   Paul Walker via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   via llvm-commits
• [llvm] [BOLT][DWARF] Refactor legacy ranges writers (PR #96006)   Sayhaan Siddiqui via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   Matt Arsenault via llvm-commits
• [llvm] [llvm] format and terminate namespaces with closing comment (PR #94917)   Aiden Grossman via llvm-commits
• [compiler-rt] 513644b - [scudo] Add TEST_SKIP macro to skip the current test (#96192)   via llvm-commits
• [compiler-rt] [scudo] Add TEST_SKIP macro to skip the current test (PR #96192)   Fabio D'Urso via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Chandler Carruth via llvm-commits
• [llvm] [IR] Lazily initialize the class to pass name mapping (NFC) (PR #96321)   Arthur Eubanks via llvm-commits
• [llvm] Add the 'initializes' attribute langref and support (PR #84803)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #96240)   via llvm-commits
• [llvm] [NVPTX] Fold (add (select 0, (mul a, b)), c) -> (select (mad a, b, c), c) (PR #96352)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fold (add (select 0, (mul a, b)), c) -> (select (mad a, b, c), c) (PR #96352)   via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   Joe Nash via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Alan Phipps via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] [NVPTX] Basic support for "grid_constant" (PR #96125)   via llvm-commits
• [llvm] 7b57a1b - [llvm] format and terminate namespaces with closing comment (#94917)   via llvm-commits
• [llvm] [llvm] format and terminate namespaces with closing comment (PR #94917)   Mohammed Keyvanzadeh via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFCI] Remove preload kernarg alloc dep on DAG isel path (PR #96030)   Matt Arsenault via llvm-commits
• [llvm] MathExtras: avoid unnecessarily widening types (PR #95426)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang][OpenMP] Shorten directive classification in ParseOpenMP (PR #94691)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [llvm][AArch64][TableGen] Create a ProcessorAlias record. NFC (PR #96249)   Jon Roelofs via llvm-commits
• [llvm] [BranchRelaxation] Remove quadratic behavior in relaxation pass (PR #96250)   Daniel Hoekwater via llvm-commits
• [clang] [llvm] [llvm][AArch64] Move Apple aliases into the CpuAlias map (PR #96249)   Jon Roelofs via llvm-commits
• [clang] [llvm] [llvm][AArch64] Move Apple aliases into the CpuAlias map (PR #96249)   Jon Roelofs via llvm-commits
• [clang] [llvm] [llvm][AArch64] Move Apple aliases into the CpuAlias map (PR #96249)   Jon Roelofs via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   Sven Verdoolaege via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize to cmn (PR #96349)   via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize eligible compares to cmn (PR #96349)   via llvm-commits
• [llvm] 31bbaf4 - [gn build] Port 5ece35df8586   LLVM GN Syncbot via llvm-commits
• [llvm] 3984e58 - [gn build] Port 7c814c13d0df   LLVM GN Syncbot via llvm-commits
• [llvm] df54be4 - [gn build] Port b8f0ca09b667   LLVM GN Syncbot via llvm-commits
• [llvm] 5d6d2fc - AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (#96351)   via llvm-commits
• [llvm] AMDGPU: Fix overriding SubtargetPredicate in MUBUF_Real_gfx90a (PR #96351)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [llvm] b9c7d60 - AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (#96337)   via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Matt Arsenault via llvm-commits
• [llvm] [mlir] Revert "[mlir][spirv] Add a generic convert-to-spirv pass" (PR #96359)   Angel Zhang via llvm-commits
• [llvm] [mlir] Reland "[mlir][spirv] Add a generic convert-to-spirv pass" (PR #96359)   Angel Zhang via llvm-commits
• [llvm] AMDGPU: Start fixing inconsistencies in usage of SubtargetPredicate (PR #96337)   Shilei Tian via llvm-commits
• [llvm] [mlir] Reland "[mlir][spirv] Add a generic convert-to-spirv pass" (PR #96359)   via llvm-commits
• [llvm] [mlir] Reland "[mlir][spirv] Add a generic convert-to-spirv pass" (PR #96359)   Keith Smiley via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [MTE] add option to disable UAS for memtag-stack (PR #96360)   Florian Mayer via llvm-commits
• [llvm] [MTE] add option to disable UAS for memtag-stack (PR #96360)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Arthur Eubanks via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Fangrui Song via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   via llvm-commits
• [llvm] [VPlan] First step towards VPlan cost modeling. (PR #92555)   Arthur Eubanks via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)   via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Ellis Hoag via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Alan Phipps via llvm-commits
• [llvm] InstrProf: Mark BiasLI as invariant. (PR #95588)   NAKAMURA Takumi via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Ellis Hoag via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Ellis Hoag via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Ellis Hoag via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   Ellis Hoag via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Fangrui Song via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [clang-tools-extra] [compiler-rt] [lldb] [llvm] [Memprof] Adds the option to collect AccessCountHistograms for memprof. (PR #94264)   Teresa Johnson via llvm-commits
• [llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)   via llvm-commits
• [llvm] InstrProf: Mark BiasLI as invariant. (PR #95588)   Ellis Hoag via llvm-commits
• [llvm] 73a2232 - AMDGPU: Materialize bitwise not of inline immediates (#95960)   via llvm-commits
• [llvm] AMDGPU: Materialize bitwise not of inline immediates (PR #95960)   Matt Arsenault via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] 7d2c2af - [lld][WebAssembly] Return 0 for synthetic function offsets (#96134)   via llvm-commits
• [lld] [lld][WebAssembly] Return 0 for synthetic function offsets (PR #96134)   Heejin Ahn via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Daniel Thornburgh via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Eli Friedman via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [clang] [llvm] [Clang][Coroutines] Introducing the `[[clang::coro_inplace_task]]` attribute (PR #94693)   Yuxuan Chen via llvm-commits
• [llvm] Enable logf128 constant folding for AArch64 (PR #96287)   Eli Friedman via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)   Jeffrey Byrnes via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   Eli Friedman via llvm-commits
• [llvm] InstrProf: Mark BiasLI as invariant. (PR #95588)   NAKAMURA Takumi via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Eli Friedman via llvm-commits
• [llvm] InstrProf: Mark BiasLI as invariant. (PR #95588)   NAKAMURA Takumi via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [compiler-rt] b515d9e - [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (#95796)   via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] 91db7ad - [gn build] Port b515d9ea1e43   LLVM GN Syncbot via llvm-commits
• [clang] [llvm] [Clang][ARM][AArch64] Alway emit protection attributes for functions. (PR #82819)   Eli Friedman via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   via llvm-commits
• [clang] [libc] [llvm] [libc] Implement (v|f)printf on the GPU (PR #96369)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [libc] Implement (v|f)printf on the GPU (PR #96369)   via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   LLVM Continuous Integration via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   Lei Wang via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [llvm] a0e1b4a - [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr,i8) (#96040)   via llvm-commits
• [llvm] [MC/DC][Coverage] Split out Read-modfy-Write to rmw_or(ptr, i8) (PR #96040)   NAKAMURA Takumi via llvm-commits
• [llvm] ba2f496 - [MC][AArch64][NFC] Re-enable a test (#96344)   via llvm-commits
• [llvm] [MC][AArch64][NFC] Re-enable a test (PR #96344)   Igor Kudrin via llvm-commits
• [compiler-rt] [hwasan][aarch64] Fix missing DT_AARCH64_BTI_PLT flag (PR #95796)   LLVM Continuous Integration via llvm-commits
• [llvm] [openmp] [OpenMP] [OMPT] Callback registration should not depend on the device init callback. (PR #96371)   via llvm-commits
• [llvm] [openmp] [OpenMP] [OMPT] Callback registration should not depend on the device init callback. (PR #96371)   via llvm-commits
• [lld] [ELF] Postpone more linker script errors (PR #96361)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Piyou Chen via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] a41a46c - [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (#95879)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Joseph Huber via llvm-commits
• [clang] [llvm] [clang][Driver] Add HIPAMD Driver support for AMDGCN flavoured SPIR-V (PR #95061)   Alex Voicu via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine dominator tree analysis to new pass manager (PR #95879)   LLVM Continuous Integration via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [llvm] [InstCombineCompare] Use known bits to insert assume intrinsics. (PR #96017)   Mikhail Gudim via llvm-commits
• [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)   via llvm-commits
• [llvm] [MC/DC][Coverage] Make tvbitmapupdate capable of atomic write (PR #96042)   NAKAMURA Takumi via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Yingwei Zheng via llvm-commits
• [llvm] 905e4ec - [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (#96118)   via llvm-commits
• [llvm] [InstCombine] Implement folds of icmp of UCMP/SCMP call and a constant (PR #96118)   Yingwei Zheng via llvm-commits
• [llvm] c5f5238 - [SPIRV] #include "llvm/IR/PassInstrumentation.h"   Fangrui Song via llvm-commits
• [llvm] [Don't merge][LLVM] Refine undef to null values (PR #96375)   Yingwei Zheng via llvm-commits
• [llvm] [Don't merge][LLVM] Refine undef to null values (PR #96375)   Yingwei Zheng via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [llvm] 9486c35 - [ARM] Simplify ElfMappingSymbolInfo. NFC   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   via llvm-commits
• [llvm] [SampleFDO] Stale profile call-graph matching (PR #95135)   David Li via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [MC/DC][Coverage] Make tvbitmapupdate capable of atomic write (PR #96042)   NAKAMURA Takumi via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   via llvm-commits
• [llvm] 8742477 - [MC] Remove the Parent parameter from MCFragment ctor callers. NFC   Fangrui Song via llvm-commits
• [llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)   Piyou Chen via llvm-commits
• [llvm] 9b44cfb - [MC] Remove unused section parameters from MCFragment constructors   Fangrui Song via llvm-commits
• [llvm] APFloat: Add minimumnum and maximumnum (PR #96304)   YunQiang Su via llvm-commits
• [llvm] [AArch64][MachineOutliner][NFC] Re-enable some tests (PR #96376)   Igor Kudrin via llvm-commits
• [llvm] [AArch64][MachineOutliner][NFC] Re-enable some tests (PR #96376)   via llvm-commits
• [llvm] 82f9b0f - [MC] Remove Parent initializer from MCFragment ctor   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   Yingwei Zheng via llvm-commits
• [llvm] [Don't merge][LLVM] Refine undef to null values (PR #96375)   Yingwei Zheng via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Yingwei Zheng via llvm-commits
• [llvm] [FinalizelSel] Re-scan the MachineFunction if we insert a new MBB by custom insertion (PR #96046)   Jianjian Guan via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [clang] [libc] [llvm] [libc] Implement (v|f)printf on the GPU (PR #96369)   Matt Arsenault via llvm-commits
• [llvm] [Don't merge][LLVM] Refine undef to null values (PR #96375)   Yingwei Zheng via llvm-commits
• [llvm] 4684d0c - [MC] emitLabelAtPos: change parameter to MCDataFragment &. NFC   Fangrui Song via llvm-commits
• [llvm] 369e24a - [MC] Fix emitCOFFSafeSEH after 9b44cfbdbf694e29d80bea688f3ecbfd1d764bfd   Fangrui Song via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine post dominator tree analysis to new pass manager (PR #96378)   via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] c9c0c46 - [gn build] Port bfd263a34df5   LLVM GN Syncbot via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   Matt Arsenault via llvm-commits
• [llvm] a89669c - [X86][MC] Drop optional from LowerMachineOperand (#96338)   via llvm-commits
• [llvm] [X86][MC] Drop optional from LowerMachineOperand (PR #96338)   Alexis Engelke via llvm-commits
• [llvm] [Don't merge][LLVM] Refine undef to null values (PR #96375)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   Nikita Popov via llvm-commits
• [llvm] 7500646 - [MC] Remove pending labels   Fangrui Song via llvm-commits
• [llvm] b0ae923 - [ProfileData] Add a variant of getValueProfDataFromInst (#95993)   via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Alexis Engelke via llvm-commits
• [llvm] [Transforms] Migrate to a new version of getValueProfDataFromInst (PR #96380)   Kazu Hirata via llvm-commits
• [llvm] [Transforms] Migrate to a new version of getValueProfDataFromInst (PR #96380)   via llvm-commits
• [llvm] [ProfileData] Migrate to a new version of getValueProfDataFromInst (PR #96381)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Migrate to a new version of getValueProfDataFromInst (PR #96381)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine post dominator tree analysis to new pass manager (PR #96378)   via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Yingwei Zheng via llvm-commits
• [clang] [compiler-rt] [ubsan] Display correct runtime messages for negative _BitInt (PR #93612)   Martin Storsjö via llvm-commits
• [llvm] [ProfileData] Add a variant of getValueProfDataFromInst (PR #95993)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine post dominator tree analysis to new pass manager (PR #96378)   via llvm-commits
• [llvm] [SPIR-V]: Improve pattern matching to recognize a composite constant to be a constant (PR #96286)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (PR #96091)   Michal Paszkowski via llvm-commits
• [llvm] 8e9c6bf - [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (#94854)   via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   LLVM Continuous Integration via llvm-commits
• [llvm] [NewPM] Add deduction guide to `MFPropsModifier` to suppress warning (PR #96384)   via llvm-commits
• [llvm] 4145ad2 - [NewPM] Add deduction guide to `MFPropsModifier` to suppress warning (#96384)   via llvm-commits
• [llvm] [NewPM] Add deduction guide to `MFPropsModifier` to suppress warning (PR #96384)   via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen][NewPM] Extract MachineFunctionProperties modification part to an RAII class (PR #94854)   LLVM Continuous Integration via llvm-commits
• [llvm] [coverage] Add option for keeping mappings order (PR #91600)   via llvm-commits
• [llvm] [coverage] Add option for keeping mappings order (PR #91600)   via llvm-commits
• [llvm] [OpenMP] Fix stack corruption due to argument mismatch (PR #96386)   Sushant Gokhale via llvm-commits
• [llvm] [OpenMP] Fix stack corruption due to argument mismatch (PR #96386)   via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   Matt Arsenault via llvm-commits
• [llvm] [OpenMP] Fix stack corruption due to argument mismatch (PR #96386)   Joseph Huber via llvm-commits
• [llvm] [coverage] Add option for keeping mappings order (PR #91600)   via llvm-commits
• [clang] [llvm] [LLVM] Fix incorrect alignment on AMDGPU variadics (PR #96370)   Joseph Huber via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine post dominator tree analysis to new pass manager (PR #96378)   via llvm-commits
• [llvm] [OpenMP] Fix stack corruption due to argument mismatch (PR #96386)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   David Green via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for builtins on GPU targets (PR #95304)   Yaxun Liu via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Christudasan Devadasan via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   David Green via llvm-commits
• [llvm] [NFC][Clang][OMPX] Fix a typo in `OMP.td` (PR #96398)   Shilei Tian via llvm-commits
• [llvm] [NFC][Clang][OMPX] Fix a typo in `OMP.td` (PR #96398)   via llvm-commits
• [llvm] [NFC][Clang][OMPX] Fix a typo in `OMP.td` (PR #96398)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Michał Górny via llvm-commits
• [llvm] 485d7ea - [MC] Remove remnant code related to pending labels   Fangrui Song via llvm-commits
• [llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)   via llvm-commits
• [llvm] a4ca225 - [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (#96216)   via llvm-commits
• [llvm] [InstCombine] (uitofp bool X) * Y --> X ? Y : 0 (PR #96216)   Alex MacLean via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] 8fa4fe1 - [MC] AttemptToFoldSymbolOffsetDifference: remove MCDummyFragment check. NFC   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Yingwei Zheng via llvm-commits
• [llvm] [MC] MCFragment in bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [MC] MCFragment in bump allocator (PR #96402)   via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Alexis Engelke via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Alexis Engelke via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Alexis Engelke via llvm-commits
• [llvm] 2c9c22c - [ARM64EC] Fix thunks for vector args (#96003)   via llvm-commits
• [llvm] [ARM64EC] Fix thunks for vector args (PR #96003)   Daniel Paoliello via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   Yingwei Zheng via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Alexis Engelke via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Johannes Doerfert via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   David Blaikie via llvm-commits
• [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)   David Blaikie via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Kazu Hirata via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   via llvm-commits
• [llvm] ca5ba2e - [Support] Avoid warning about possibly uninitialized variable in format_provider (#95704)   via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   David Blaikie via llvm-commits
• [llvm] [Support] Avoid warning about possibly uninitialized variable in format_provider (PR #95704)   via llvm-commits
• [llvm] [ADT] Update hash function of uint64_t for DenseMap (PR #95734)   Fangrui Song via llvm-commits
• [llvm] fc23564 - [NFC][Clang][OMPX] Fix a typo in `OMP.td` (#96398)   via llvm-commits
• [llvm] [NFC][Clang][OMPX] Fix a typo in `OMP.td` (PR #96398)   Shilei Tian via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] 8cb6e58 - [MC] Allocate MCFragment with a bump allocator   via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [NFC][Clang][OMPX] Fix a typo in `OMP.td` (PR #96398)   LLVM Continuous Integration via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   David Blaikie via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   David Blaikie via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   David Blaikie via llvm-commits
• [llvm] c9f6a5e - [MC] Move computeBundlePadding closer to its only caller. NFC   Fangrui Song via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Nikita Popov via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Nikita Popov via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Nikita Popov via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Nikita Popov via llvm-commits
• [llvm] 3ba7599 - [gn] port ade28a77ed1776 (clang-doc asset copy to share/clang)   Nico Weber via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Craig Topper via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Kazu Hirata via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Craig Topper via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Kazu Hirata via llvm-commits
• [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)   Anshil Gandhi via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #96409)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #96409)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #96409)   via llvm-commits
• [llvm] [AArch64] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #95881)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #96409)   Tim Gymnich via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Fangrui Song via llvm-commits
• [llvm] [IndirectCallPromotion] Use ArrayRef consistently (NFC) (PR #96412)   Kazu Hirata via llvm-commits
• [llvm] [IndirectCallPromotion] Use ArrayRef consistently (NFC) (PR #96412)   via llvm-commits
• [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [clang] [llvm] [Serialization] Use stable hash functions (PR #96136)   Michał Górny via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] 05ba5c0 - [MC] MCSectionSubPair: replace const MCExpr * with uint32_t   Fangrui Song via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] 61c4d7b - [InstCombine] Add tests for expanding `foldSelectValueEquivalence`; NFC   Noah Goldstein via llvm-commits
• [llvm] b37a4b9 - [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants   Noah Goldstein via llvm-commits
• [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` for non-constants (PR #94719)   via llvm-commits
• [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)   via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Offload] Refactor offload test requirements (PR #95196)   Ethan Luis McDonough via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [X86] Widden binary shuffle to unary for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [X86] Widden binary shuffle to unary for i8/i16 (PR #96414)   via llvm-commits
• [clang] [compiler-rt] [llvm] [openmp] [PGO][Offload] Add GPU profiling flags to driver (PR #94268)   Ethan Luis McDonough via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Jakub Kuderski via llvm-commits
• [llvm] 95f983f - [MC] Change Subsection parameters from const MCExpr * to uint32_t   Fangrui Song via llvm-commits
• [llvm] e7622ab - [MC] Remove unused MCObjectStreamer::CurSubsectionIdx. NFC   Fangrui Song via llvm-commits
• [llvm] [X86] Widden binary shuffle to unary for i8/i16 (PR #96414)   Simon Pilgrim via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Migrate to a new version of getValueProfDataFromInst (PR #96420)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine-branch-prob to new pass manager (PR #96389)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Migrate to a new version of getValueProfDataFromInst (PR #96420)   via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [llvm] a440a96 - AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (#95592)   via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (PR #95593)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (PR #95593)   Matt Arsenault via llvm-commits
• [llvm] 414c741 - AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (#95593)   via llvm-commits
• [llvm] AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (PR #95593)   Matt Arsenault via llvm-commits
• [llvm] 70c8b9c - AMDGPU: Remove ds atomic fadd intrinsics (#95396)   via llvm-commits
• [clang] [llvm] AMDGPU: Remove ds atomic fadd intrinsics (PR #95396)   Matt Arsenault via llvm-commits
• [llvm] [CaptureTracking] Do not capture compares of same object (PR #74228)   Joshua Cao via llvm-commits
• [llvm] [CaptureTracking] Do not capture compares of same object (PR #74228)   Joshua Cao via llvm-commits
• [llvm] AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (PR #95593)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Add amdgpu.no.remote.memory when upgrading old atomic intrinsics (PR #89655)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Start selecting buffer fat pointer atomicrmw fmin/fmax (PR #95593)   Matt Arsenault via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Nikita Popov via llvm-commits
• [llvm] 3ae6755 - [DebugInfo][DivRemPairs] Fix missing debug location updates (#96045)   via llvm-commits
• [llvm] [DebugInfo][DivRemPairs] Fix missing debug location updates (PR #96045)   Shan Huang via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [llvm] f7fc72e - [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (#94915)   via llvm-commits
• [llvm] [InstCombine] fold `(a == c && b != c) || (a != c && b == c))` to `(a == c) == (b != c)` (PR #94915)   Zain Jaffal via llvm-commits
• [clang] [llvm] AMDGPU: Remove ds atomic fadd intrinsics (PR #95396)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] AMDGPU: Start selecting flat/global atomicrmw fmin/fmax. (PR #95592)   LLVM Continuous Integration via llvm-commits
• [llvm] add check inversion for x and xor x, -1 (PR #96425)   Zain Jaffal via llvm-commits
• [llvm] add check inversion for x and xor x, -1 (PR #96425)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port machine post dominator tree analysis to new pass manager (PR #96378)   Matt Arsenault via llvm-commits
• [llvm] add check inversion for x and xor x, -1 (PR #96425)   Yingwei Zheng via llvm-commits
• [llvm] add check inversion for x and xor x, -1 (PR #96425)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] add check inversion for x and xor x, -1 (PR #96425)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] add check inversion for x and xor x, -1 (PR #96425)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [Offload] Refactor offload test requirements (PR #95196)   Joseph Huber via llvm-commits
• [llvm] fix(bolt/**.py): fix comparison to None (PR #94012)   Eisuke Kawashima via llvm-commits
• [clang] [compiler-rt] [llvm] [openmp] [PGO][Offload] Add GPU profiling flags to driver (PR #94268)   Joseph Huber via llvm-commits
• [polly] fix(polly/**.py): fix comparison to None (PR #94021)   Eisuke Kawashima via llvm-commits
• [llvm] fix(llvm/**.py): fix comparison to None (PR #94018)   Eisuke Kawashima via llvm-commits
• [llvm] fix(cross-project-tests/**.py): fix comparison to None (PR #94016)   Eisuke Kawashima via llvm-commits
• [compiler-rt] fix(compiler-rt/**.py): fix comparison to None (PR #94015)   Eisuke Kawashima via llvm-commits
• [llvm] fix(llvm/**.py): fix comparison to True/False (PR #94040)   Eisuke Kawashima via llvm-commits
• [polly] fix(polly/**.py): fix comparison to True/False (PR #94042)   Eisuke Kawashima via llvm-commits
• [llvm] eb76bc3 - [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (#96200)   via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   Luke Lau via llvm-commits
• [compiler-rt] fix(compiler-rt/**.py): fix invalid escape sequences (PR #94030)   Eisuke Kawashima via llvm-commits
• [llvm] fix(cross-project-tests/**.py): fix invalid escape sequences (PR #94031)   Eisuke Kawashima via llvm-commits
• [lld] fix(lld/**.python): fix invalid escape sequences (PR #94033)   Eisuke Kawashima via llvm-commits
• [llvm] fix(llvm/**.py): fix invalid escape sequences (PR #94035)   Eisuke Kawashima via llvm-commits
• [polly] fix(polly/**.py): fix invalid escape sequences (PR #94037)   Eisuke Kawashima via llvm-commits
• [llvm] fix(llvm/**.py): fix invalid escape sequences (PR #94035)   via llvm-commits
• [polly] fix(polly/**.py): fix invalid escape sequences (PR #94037)   via llvm-commits
• [polly] fix(polly/**.py): fix invalid escape sequences (PR #94037)   Eisuke Kawashima via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Widden binary shuffle to unary for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [X86] Widden binary shuffle to unary for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [CodeGen] Emit more efficient magic numbers for exact udivs (PR #87161)   via llvm-commits
• [llvm] [CodeGen] Emit more efficient magic numbers for exact udivs (PR #87161)   via llvm-commits
• [llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Emit more efficient magic numbers for exact udivs (PR #87161)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] c19028f - [GenericDomTree] Use range-based for loops (NFC) (#96404)   via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   Kazu Hirata via llvm-commits
• [clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)   Vikram Hegde via llvm-commits
• [clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)   Vikram Hegde via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [SimplifyCFG] Replace unreachable switch lookup table holes with poison (PR #94990)   via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Nikita Popov via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [clang] [llvm] [AMDGPU] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)   Vikram Hegde via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Fangrui Song via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Fangrui Song via llvm-commits
• [llvm] 21fac2d - [MC] Ensure all new sections have a MCDataFragment   Fangrui Song via llvm-commits
• [llvm] [GenericDomTree] Use range-based for loops (NFC) (PR #96404)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Adds float/double tests to load-store tests. (PR #96436)   via llvm-commits
• [llvm] [NVPTX] Adds float/double tests to load-store tests. (PR #96436)   via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Kazu Hirata via llvm-commits
• [llvm] 05d167f - [llvm] Use llvm::sort (NFC) (#96434)   via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   Kazu Hirata via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   via llvm-commits
• [llvm] [X86AsmParser] IntelExpression: End of Statement should check for valid end state (PR #95677)   via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] Use llvm::sort (NFC) (PR #96434)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86AsmParser] IntelExpression: End of Statement should check for valid end state (PR #95677)   via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [ProfileData] Use std::array for ValueProfData (PR #96440)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Use std::array for ValueProfData (PR #96440)   via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   David Green via llvm-commits
• [llvm] ab9c2b1 - [VPlan] Restructure code for BranchOnCond codegen. (NFCI)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)   Florian Hahn via llvm-commits
• [llvm] 31a94bd - [VPlan] Rename Preheader -> Entry in createInitialVPlan (NFCI).   Florian Hahn via llvm-commits
• [llvm] ef1773a - [VPlan] Rewrite cloneSESE to use 2 depth-first passes (NFCI).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] de0d482 - [MC, COFF] Register .llvm.call-graph-profile in finalizeImpl   Fangrui Song via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Handle legal v2bf16 atomicrmw fadd for gfx12 (PR #95930)   Matt Arsenault via llvm-commits
• [llvm] [MC] Allocate MCFragment with a bump allocator (PR #96402)   Alexis Engelke via llvm-commits
• [llvm] [GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (PR #95217)   via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   via llvm-commits
• [llvm] b704868 - [test] Use llvm-objdump for COFF/section-comdat.s   Fangrui Song via llvm-commits
• [llvm] f05fa6e - [AArch64] Fix argument passing in reserved registers for preserve_nonecc (#96259)   via llvm-commits
• [clang] [llvm] [AArch64] Fix argument passing in reserved registers for preserve_nonecc (PR #96259)   via llvm-commits
• [llvm] AMDGPU: Add plumbing for private segment size argument (PR #96445)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Add plumbing for private segment size argument (PR #96445)   via llvm-commits
• [llvm] AMDGPU: Remove an outdated TODO (PR #96446)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Remove an outdated TODO (PR #96446)   via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   Vincent Lee via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   Vincent Lee via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   Vincent Lee via llvm-commits
• [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)   Vincent Lee via llvm-commits
• [llvm] abbf3bc - [MC] Avoid some registerSection calls   Fangrui Song via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve non-SVE popcount for 32bit and 64 bit using udot (PR #96409)   Tim Gymnich via llvm-commits
• [llvm] 6082a50 - [RISCV] Mark all registers marked isConstant as reserved (#96002)   via llvm-commits
• [llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [ProfileData] Use std::array for ValueProfData (PR #96440)   Fangrui Song via llvm-commits
• [llvm] 9d63506 - [MC] Move ELFWriter::createMemtagRelocs to AArch64ELFStreamer::finishImpl   Fangrui Song via llvm-commits
• [llvm] cde799f - [NC,MIPS] Avoid some registerSection calls   Fangrui Song via llvm-commits
• [llvm] 329e6b4 - [ProfileData] Use std::array for ValueProfData (#96440)   via llvm-commits
• [llvm] [ProfileData] Use std::array for ValueProfData (PR #96440)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize eligible compares to cmn (PR #96349)   via llvm-commits
• [llvm] [AArch64] Use isKnownNonZero to optimize eligible compares to cmn (PR #96349)   via llvm-commits
• [llvm] a3cf14a - [MC,COFF] Remove unneeded BeginSymName   Fangrui Song via llvm-commits
• [llvm] 905c58f - [MC] Remove unneeded setBeginSymbol. NFC   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Reduce multiplicands of even numbers when a shift is involved (PR #92475)   via llvm-commits
• [llvm] [InstCombine] Reduce multiplicands of even numbers when a shift is involved (PR #92475)   via llvm-commits
• [llvm] [ARM][AArch64] Fix extremely probable documentation error in A57 (PR #87354)   via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #96447)   Benji Smith via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #71291)   Benji Smith via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #71291)   Benji Smith via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #96447)   via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #96447)   via llvm-commits
• [llvm] [C API] Add getters for Target Extension Types to C API (PR #96447)   Benji Smith via llvm-commits
• [llvm] Reapply "[ARM][NFC] Use addLiveIns method instead of manually adding live ins (#87560)" (PR #96448)   via llvm-commits
• [llvm] Reapply "[ARM][NFC] Use addLiveIns method instead of manually adding live ins (#87560)" (PR #96448)   via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] [InstCombine] Fold Minimum over Trailing/Leading Bits Counts (PR #90402)   via llvm-commits
• [llvm] Reapply "[ARM][NFC] Use addLiveIns method instead of manually adding live ins (#87560)" (PR #96448)   via llvm-commits
• [llvm] 8f49dab - [BPI] Use BasicBlock::isEHPad() to check exception handling block. (#95771)   via llvm-commits
• [llvm] [BPI] Use BasicBlock::isEHPad() to check exception handling block. (PR #95771)   via llvm-commits
• [llvm] [AVR][NFC] Improve format of target description files (PR #96449)   Ben Shi via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Introduce `MachineDomTreeUpdater` (PR #95369)   Jakub Kuderski via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [AVR][NFC] Improve format of target description files (PR #96449)   Jianjian Guan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [lld] [llvm] [llvm][lld][NFC] Avoid reopening namespace std (PR #96450)   via llvm-commits
• [lld] [llvm] [llvm][lld][NFC] Avoid reopening namespace std (PR #96450)   via llvm-commits
• [lld] [llvm] [llvm][lld][NFC] Avoid reopening namespace std (PR #96450)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [AVR][NFC] Improve format of target description files (PR #96449)   via llvm-commits
• [llvm] 5997e7d - Revert "[MC] Move ELFWriter::createMemtagRelocs to AArch64ELFStreamer::finishImpl"   Fangrui Song via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [llvm] [InstCombine] Reduce multiplicands of even numbers when a shift is involved (PR #92475)   via llvm-commits
• [llvm] Give a warning when no dwo files are provided (PR #94336)   Jinjie Huang via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] ffec315 - [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (#96410)   via llvm-commits
• [llvm] [InstSimplify] Provide information about the range of possible values that `ucmp`/`scmp` can return (PR #96410)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] [InstCombine] Combine ptrauth intrin. callee into same-key bundle. (PR #94707)   Daniil Kovalev via llvm-commits
• [llvm] fec1b6f - [MC] Move ELFWriter::createMemtagRelocs to AArch64TargetELFStreamer::finish   Fangrui Song via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] efdb91e - [ARM] Move ARMELFStreamer::finishImpl to ARMTargetELFStreamer::finish. NFC   Fangrui Song via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] a9ac319 - [MC] Make MCELFStreamer::finishImpl final   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Pengcheng Wang via llvm-commits
• [lld] [llvm] [llvm][lld][NFC] Avoid reopening namespace std (PR #96450)   Jakub Kuderski via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Yingwei Zheng via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Yingwei Zheng via llvm-commits
• [clang] [compiler-rt] [llvm] [openmp] [PGO][Offload] Add GPU profiling flags to driver (PR #94268)   Ethan Luis McDonough via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Piyou Chen via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Piyou Chen via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   via llvm-commits
• [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)   Chen Zheng via llvm-commits
• [clang] [llvm] security check cookie execute only when needed (PR #95904)   via llvm-commits
• [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)   Chen Zheng via llvm-commits
• [llvm] [AMDGPU]Optimize SGPR spills (PR #93668)   Vikash Gupta via llvm-commits
• [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)   Serge Pavlov via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)   YAMAMOTO Takashi via llvm-commits
• [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)   YAMAMOTO Takashi via llvm-commits
• [llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)   Craig Topper via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Florian Hahn via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] 1c025fb - [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (#95902)   via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Support hoisting load/store with conditional faulting (PR #95515)   Shengchen Kan via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (PR #95819)   David Green via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][SplitModule] Allow non-kernels to be treated as roots (PR #95902)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Combine VPERMV3 to VPERMV for i8/i16 (PR #96414)   Phoebe Wang via llvm-commits