[llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)

[Francis Visoiu Mistrih via llvm-commits]

================
@@ -104,14 +104,16 @@ BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   auto &Subtarget = MF.getSubtarget<RISCVSubtarget>();
 
-  // Mark any registers requested to be reserved as such
   for (size_t Reg = 0; Reg < getNumRegs(); Reg++) {
----------------
francisvm wrote:

Yeah I kind of agree. I reverted it back to the initial patch. I don't think calling `isRegisterReservedByUser` with non-GPRs is an issue.

https://github.com/llvm/llvm-project/pull/96002