[llvm] 0ee2af5 - mcdc.ll: Relax.
NAKAMURA Takumi via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 20 16:00:54 PDT 2024
Author: NAKAMURA Takumi
Date: 2024-06-21T08:00:23+09:00
New Revision: 0ee2af5f7c4c941c4588a67c87cb39e7dfad5ce8
URL: https://github.com/llvm/llvm-project/commit/0ee2af5f7c4c941c4588a67c87cb39e7dfad5ce8
DIFF: https://github.com/llvm/llvm-project/commit/0ee2af5f7c4c941c4588a67c87cb39e7dfad5ce8.diff
LOG: mcdc.ll: Relax.
Added:
Modified:
llvm/test/Instrumentation/InstrProfiling/mcdc.ll
Removed:
################################################################################
diff --git a/llvm/test/Instrumentation/InstrProfiling/mcdc.ll b/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
index 4980b45f90c50..faff2b76463db 100644
--- a/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
+++ b/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
@@ -1,5 +1,5 @@
; Check that MC/DC intrinsics are properly lowered
-; RUN: opt < %s -passes=instrprof -S | FileCheck %s
+; RUN: opt < %s -passes=instrprof -S | FileCheck %s --check-prefixes=CHECK,BASIC
; RUN: opt < %s -passes=instrprof -runtime-counter-relocation -S 2>&1 | FileCheck %s --check-prefix RELOC
; RELOC: Runtime counter relocation is presently not supported for MC/DC bitmaps
@@ -8,14 +8,14 @@ target triple = "x86_64-unknown-linux-gnu"
@__profn_test = private constant [4 x i8] c"test"
-; CHECK: @__profbm_test = private global [1 x i8] zeroinitializer, section "__llvm_prf_bits", comdat, align 1
+; BASIC: [[PROFBM_ADDR:@__profbm_test]] = private global [1 x i8] zeroinitializer, section "__llvm_prf_bits", comdat, align 1
define dso_local void @test(i32 noundef %A) {
entry:
%A.addr = alloca i32, align 4
%mcdc.addr = alloca i32, align 4
call void @llvm.instrprof.cover(ptr @__profn_test, i64 99278, i32 5, i32 0)
- ; CHECK: store i8 0, ptr @__profc_test, align 1
+ ; BASIC: store i8 0, ptr @__profc_test, align 1
call void @llvm.instrprof.mcdc.parameters(ptr @__profn_test, i64 99278, i32 1)
store i32 0, ptr %mcdc.addr, align 4
@@ -26,13 +26,13 @@ entry:
; CHECK: %[[TEMP0:mcdc.*]] = load i32, ptr %mcdc.addr, align 4
; CHECK-NEXT: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
; CHECK-NEXT: %[[LAB4:[0-9]+]] = lshr i32 %[[TEMP]], 3
- ; CHECK-NEXT: %[[LAB7:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB4]]
+ ; CHECK-NEXT: %[[LAB7:[0-9]+]] = getelementptr inbounds i8, ptr [[PROFBM_ADDR]], i32 %[[LAB4]]
; CHECK-NEXT: %[[LAB8:[0-9]+]] = and i32 %[[TEMP]], 7
; CHECK-NEXT: %[[LAB9:[0-9]+]] = trunc i32 %[[LAB8]] to i8
; CHECK-NEXT: %[[LAB10:[0-9]+]] = shl i8 1, %[[LAB9]]
; CHECK-NEXT: %[[BITS:mcdc.*]] = load i8, ptr %[[LAB7]], align 1
- ; CHECK-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]]
- ; CHECK-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1
+ ; BASIC-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]]
+ ; BASIC-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1
ret void
}
More information about the llvm-commits
mailing list