[llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #95510)

[Chen Zheng via llvm-commits]

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@@ -107,6 +108,19 @@ StringRef XCOFF::getNameForTracebackTableLanguageId(
 }
 #undef LANG_CASE
 
+XCOFF::CFileCpuId XCOFF::getCpuID(StringRef CPU) {
+  return StringSwitch<XCOFF::CFileCpuId>(CPU)
+      .Case("pwr4", XCOFF::TCPU_PWR)
+      .Case("pwr5", XCOFF::TCPU_PWR5)
+      .Case("pwr6", XCOFF::TCPU_PWR6)
+      .Case("pwr5x", XCOFF::TCPU_PWR5X)
+      .Case("pwr7", XCOFF::TCPU_PWR7)
+      .Case("pwr8", XCOFF::TCPU_PWR8)
+      .Case("pwr9", XCOFF::TCPU_PWR9)
+      .Case("pwr10", XCOFF::TCPU_PWR10)
+      .Default(XCOFF::TCPU_PWR7);
----------------
chenzheng1030 wrote:

We need a better mapping for clang supports CPUs:
```
generic, 440, 450, 601, 602, 603, 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750, 8548, 970, g5, a2, e500, e500mc, e5500, power3, pwr3, power4, pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7, pwr7, power8, pwr8, power9, pwr9, power10, pwr10, powerpc, ppc, ppc32, powerpc64, ppc64, powerpc64le, ppc64le, future
```

and the `.machine` supports CPUs:
```
#define TCPU_INVALID    0       /* Invalid id - assumes POWER for old objects */
#define TCPU_PPC        1       /* PowerPC common architecture 32 bit mode */
#define TCPU_PPC64      2       /* PowerPC common architecture 64 bit mode */
#define TCPU_COM        3       /* POWER and PowerPC architecture common */
#define TCPU_PWR        4       /* POWER common architecture objects */
#define TCPU_ANY        5       /* Mixture of any incompatable POWER */
                                /* and PowerPC architecture implementations */
#define TCPU_601        6       /* 601 implementation of PowerPC architecture */
#define TCPU_603        7       /* 603 implementation of PowerPC architecture */
#define TCPU_604        8       /* 604 implementation of PowerPC architecture */
#define TCPU_PWR1       10      /* RS1 implementation of POWER architecture */
#define TCPU_620        16      /* 620  - PowerPC 64-bit architecture */
#define TCPU_A35        17      /* A35  - PowerPC 64-bit architecture */
#define TCPU_PWR5       18      /* PWR5 - PowerPC 64-bit architecture */
#define TCPU_970        19      /* PPC970 - PowerPC 64-bit architecture */
#define TCPU_PWR6       20      /* PWR6 - PowerPC 64-bit architecture */
#define TCPU_VEC        21      /* PowerPC 64-bit arch with Vector Extension */
#define TCPU_PWR5X      22      /* PWR5+ - PowerPC 64-bit architecture */
#define TCPU_PWR6E      23      /* PWR6E - PowerPC 64-bit architecture */
#define TCPU_PWR7       24      /* PWR7  - PowerPC 64-bit architecture */
#define TCPU_PWR8       25      /* PWR8  - PowerPC 64-bit architecture */
#define TCPU_PWR9       26      /* PWR9  - PowerPC 64-bit architecture */
#define TCPU_PWR10      27      /* PWR10 - PowerPC 64-bit architecture */
#define TCPU_PWRX       224     /* RS2 implementation of POWER architecture */
```

Now the list seems not complete. Or at least we should explicit list all the CPUs supported by our product page https://www.ibm.com/docs/en/openxl-c-and-cpp-aix/17.1.2?topic=options-mcpu

https://github.com/llvm/llvm-project/pull/95510