[llvm] abaaa48 - [PowerPC] fix frameaddress error when there is dynamic alloca call, NFC
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 20 19:37:34 PDT 2024
Author: Chen Zheng
Date: 2024-06-20T22:26:48-04:00
New Revision: abaaa48ce6b212798cc51f676f1d01d31d590120
URL: https://github.com/llvm/llvm-project/commit/abaaa48ce6b212798cc51f676f1d01d31d590120
DIFF: https://github.com/llvm/llvm-project/commit/abaaa48ce6b212798cc51f676f1d01d31d590120.diff
LOG: [PowerPC] fix frameaddress error when there is dynamic alloca call, NFC
Added:
llvm/test/CodeGen/PowerPC/frameaddr-alloca.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/frameaddr-alloca.ll b/llvm/test/CodeGen/PowerPC/frameaddr-alloca.ll
new file mode 100644
index 0000000000000..6be391fb929d9
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/frameaddr-alloca.ll
@@ -0,0 +1,138 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=AIX32
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=AIX64
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s -mcpu=pwr7 | FileCheck %s --check-prefix=LE
+
+define ptr @frame_1(i32 signext %num) nounwind {
+; AIX32-LABEL: frame_1:
+; AIX32: # %bb.0: # %entry
+; AIX32-NEXT: stw 31, -4(1)
+; AIX32-NEXT: stwu 1, -48(1)
+; AIX32-NEXT: addi 3, 3, 15
+; AIX32-NEXT: mr 31, 1
+; AIX32-NEXT: addi 4, 31, 48
+; AIX32-NEXT: rlwinm 3, 3, 0, 0, 27
+; AIX32-NEXT: neg 3, 3
+; AIX32-NEXT: stwux 4, 1, 3
+; AIX32-NEXT: addi 3, 1, 32
+; AIX32-NEXT: lbz 4, 0(3)
+; AIX32-NEXT: addi 4, 4, 1
+; AIX32-NEXT: stb 4, 0(3)
+; AIX32-NEXT: lwz 3, 0(31)
+; AIX32-NEXT: lwz 1, 0(1)
+; AIX32-NEXT: lwz 31, -4(1)
+; AIX32-NEXT: blr
+;
+; AIX64-LABEL: frame_1:
+; AIX64: # %bb.0: # %entry
+; AIX64-NEXT: std 31, -8(1)
+; AIX64-NEXT: stdu 1, -64(1)
+; AIX64-NEXT: addi 3, 3, 15
+; AIX64-NEXT: mr 31, 1
+; AIX64-NEXT: addi 4, 31, 64
+; AIX64-NEXT: rldicr 3, 3, 0, 59
+; AIX64-NEXT: neg 3, 3
+; AIX64-NEXT: stdux 4, 1, 3
+; AIX64-NEXT: addi 3, 1, 48
+; AIX64-NEXT: lbz 4, 0(3)
+; AIX64-NEXT: addi 4, 4, 1
+; AIX64-NEXT: stb 4, 0(3)
+; AIX64-NEXT: ld 3, 0(31)
+; AIX64-NEXT: ld 1, 0(1)
+; AIX64-NEXT: ld 31, -8(1)
+; AIX64-NEXT: blr
+;
+; LE-LABEL: frame_1:
+; LE: # %bb.0: # %entry
+; LE-NEXT: std 31, -8(1)
+; LE-NEXT: stdu 1, -48(1)
+; LE-NEXT: addi 3, 3, 15
+; LE-NEXT: mr 31, 1
+; LE-NEXT: addi 4, 31, 48
+; LE-NEXT: rldicr 3, 3, 0, 59
+; LE-NEXT: neg 3, 3
+; LE-NEXT: stdux 4, 1, 3
+; LE-NEXT: addi 3, 1, 32
+; LE-NEXT: lbz 4, 0(3)
+; LE-NEXT: addi 4, 4, 1
+; LE-NEXT: stb 4, 0(3)
+; LE-NEXT: ld 3, 0(31)
+; LE-NEXT: ld 1, 0(1)
+; LE-NEXT: ld 31, -8(1)
+; LE-NEXT: blr
+entry:
+ %conv = sext i32 %num to i64
+ %0 = alloca i8, i64 %conv, align 16
+ %1 = load volatile i8, ptr %0, align 16
+ %inc = add i8 %1, 1
+ store volatile i8 %inc, ptr %0, align 16
+ %2 = tail call ptr @llvm.frameaddress.p0(i32 1)
+ ret ptr %2
+}
+
+define ptr @frame_0(i32 signext %num) nounwind {
+; AIX32-LABEL: frame_0:
+; AIX32: # %bb.0: # %entry
+; AIX32-NEXT: stw 31, -4(1)
+; AIX32-NEXT: stwu 1, -48(1)
+; AIX32-NEXT: addi 3, 3, 15
+; AIX32-NEXT: mr 31, 1
+; AIX32-NEXT: addi 4, 31, 48
+; AIX32-NEXT: rlwinm 3, 3, 0, 0, 27
+; AIX32-NEXT: neg 3, 3
+; AIX32-NEXT: stwux 4, 1, 3
+; AIX32-NEXT: addi 3, 1, 32
+; AIX32-NEXT: lbz 4, 0(3)
+; AIX32-NEXT: addi 4, 4, 1
+; AIX32-NEXT: stb 4, 0(3)
+; AIX32-NEXT: mr 3, 31
+; AIX32-NEXT: lwz 1, 0(1)
+; AIX32-NEXT: lwz 31, -4(1)
+; AIX32-NEXT: blr
+;
+; AIX64-LABEL: frame_0:
+; AIX64: # %bb.0: # %entry
+; AIX64-NEXT: std 31, -8(1)
+; AIX64-NEXT: stdu 1, -64(1)
+; AIX64-NEXT: addi 3, 3, 15
+; AIX64-NEXT: mr 31, 1
+; AIX64-NEXT: addi 4, 31, 64
+; AIX64-NEXT: rldicr 3, 3, 0, 59
+; AIX64-NEXT: neg 3, 3
+; AIX64-NEXT: stdux 4, 1, 3
+; AIX64-NEXT: addi 3, 1, 48
+; AIX64-NEXT: lbz 4, 0(3)
+; AIX64-NEXT: addi 4, 4, 1
+; AIX64-NEXT: stb 4, 0(3)
+; AIX64-NEXT: mr 3, 31
+; AIX64-NEXT: ld 1, 0(1)
+; AIX64-NEXT: ld 31, -8(1)
+; AIX64-NEXT: blr
+;
+; LE-LABEL: frame_0:
+; LE: # %bb.0: # %entry
+; LE-NEXT: std 31, -8(1)
+; LE-NEXT: stdu 1, -48(1)
+; LE-NEXT: addi 3, 3, 15
+; LE-NEXT: mr 31, 1
+; LE-NEXT: addi 4, 31, 48
+; LE-NEXT: rldicr 3, 3, 0, 59
+; LE-NEXT: neg 3, 3
+; LE-NEXT: stdux 4, 1, 3
+; LE-NEXT: addi 3, 1, 32
+; LE-NEXT: lbz 4, 0(3)
+; LE-NEXT: addi 4, 4, 1
+; LE-NEXT: stb 4, 0(3)
+; LE-NEXT: mr 3, 31
+; LE-NEXT: ld 1, 0(1)
+; LE-NEXT: ld 31, -8(1)
+; LE-NEXT: blr
+entry:
+ %conv = sext i32 %num to i64
+ %0 = alloca i8, i64 %conv, align 16
+ %1 = load volatile i8, ptr %0, align 16
+ %inc = add i8 %1, 1
+ store volatile i8 %inc, ptr %0, align 16
+ %2 = tail call ptr @llvm.frameaddress.p0(i32 0)
+ ret ptr %2
+}
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