[llvm] [llvm][CodeGen] Fix failure in window scheduler caused by phi (PR #95900)
Hua Tian via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 18 05:05:19 PDT 2024
=?utf-8?b?4oCcYWtpcmF0aWFu4oCd?= <akiratian at tencent.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/95900 at github.com>
https://github.com/huaatian updated https://github.com/llvm/llvm-project/pull/95900
>From 295ff41c30cd5f2f1615fb594529347cfad3d43c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E2=80=9Cakiratian=E2=80=9D?= <akiratian at tencent.com>
Date: Tue, 18 Jun 2024 16:50:23 +0800
Subject: [PATCH 1/2] [llvm][CodeGen] Fix failure in window scheduler caused by
phi
In certain cases, the register passed with the kernel MBB in phi
are not defined within the kernel MBB. The window algorithm
currently does not support such scenarios, so a check is performed
during initialization.
---
llvm/lib/CodeGen/WindowScheduler.cpp | 8 +++-
llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir | 44 +++++++++++++++++++++
2 files changed, 51 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir
diff --git a/llvm/lib/CodeGen/WindowScheduler.cpp b/llvm/lib/CodeGen/WindowScheduler.cpp
index 418309bc9dbf5..49c30acbb86a6 100644
--- a/llvm/lib/CodeGen/WindowScheduler.cpp
+++ b/llvm/lib/CodeGen/WindowScheduler.cpp
@@ -198,6 +198,12 @@ bool WindowScheduler::initialize() {
if (MI.isMetaInstruction() || MI.isTerminator())
continue;
if (MI.isPHI()) {
+ if (Register AntiReg = getAntiRegister(&MI))
+ // Register with Kernel in phi is not defined within the Kernel itself.
+ if (MRI->getVRegDef(AntiReg)->getParent() != MBB) {
+ LLVM_DEBUG(dbgs() << "Special phi structure is not supported!\n");
+ return false;
+ }
for (auto Def : PhiDefs)
if (MI.readsRegister(Def, TRI)) {
LLVM_DEBUG(
@@ -683,7 +689,7 @@ Register WindowScheduler::getAntiRegister(MachineInstr *Phi) {
for (auto MO : Phi->uses()) {
if (MO.isReg())
AntiReg = MO.getReg();
- else if (MO.isMBB() && MO.getMBB()->getNumber() == MBB->getNumber())
+ else if (MO.isMBB() && MO.getMBB() == MBB)
return AntiReg;
}
return 0;
diff --git a/llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir b/llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir
new file mode 100644
index 0000000000000..c6da660b87cce
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir
@@ -0,0 +1,44 @@
+# REQUIRES: asserts
+# RUN: llc --march=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \
+# RUN: -window-sched=force -filetype=null 2>&1 | FileCheck %s
+
+# CHECK: Special phi structure is not supported!
+# CHECK-LABEL: body: |
+# CHECK: bb.0:
+# CHECK: [[REG:%[0-9]+]]:intregs = A2_tfrsi 0
+# CHECK: bb.2:
+# CHECK: {{%[0-9]+}}:intregs = PHI {{%[0-9]+}}, %bb.0, [[REG]], %bb.2
+
+---
+name: poll_for_response
+tracksRegLiveness: true
+body: |
+ bb.0:
+ successors: %bb.2(0x80000000)
+ liveins: $r0, $r1
+
+ %0:intregs = COPY $r1
+ %1:intregs = COPY $r0
+ %2:intregs = A2_tfrsi 0
+ J2_loop0i %bb.2, 2, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
+ J2_jump %bb.2, implicit-def dead $pc
+
+ bb.1:
+ PS_jmpret $r31, implicit-def dead $pc
+
+ bb.2:
+ successors: %bb.1(0x04000000), %bb.2(0x7c000000)
+
+ %3:intregs = PHI %1, %bb.0, %2, %bb.2
+ %4:intregs = PHI %2, %bb.0, %5, %bb.2
+ %6:intregs = S2_lsr_i_r %3, 1
+ S2_storerb_io %0, 0, killed %6
+ S4_storerb_rr %0, %4, 0, %2
+ %5:intregs = A2_tfrsi 1
+ ENDLOOP0 %bb.2, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
+ J2_jump %bb.1, implicit-def $pc
+
+...
+
+
+
>From ea00efc1a5671603fc6fe1183f759a79918bf30e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E2=80=9Cakiratian=E2=80=9D?= <akiratian at tencent.com>
Date: Tue, 18 Jun 2024 20:04:29 +0800
Subject: [PATCH 2/2] [llvm][CodeGen] Modifications made based on review
comments 1
---
llvm/lib/CodeGen/WindowScheduler.cpp | 15 ++++++---------
.../Hexagon/{swp-ws-fail-3.mir => swp-ws-phi.mir} | 5 +----
2 files changed, 7 insertions(+), 13 deletions(-)
rename llvm/test/CodeGen/Hexagon/{swp-ws-fail-3.mir => swp-ws-phi.mir} (95%)
diff --git a/llvm/lib/CodeGen/WindowScheduler.cpp b/llvm/lib/CodeGen/WindowScheduler.cpp
index 49c30acbb86a6..7a86351a1f4e3 100644
--- a/llvm/lib/CodeGen/WindowScheduler.cpp
+++ b/llvm/lib/CodeGen/WindowScheduler.cpp
@@ -198,12 +198,6 @@ bool WindowScheduler::initialize() {
if (MI.isMetaInstruction() || MI.isTerminator())
continue;
if (MI.isPHI()) {
- if (Register AntiReg = getAntiRegister(&MI))
- // Register with Kernel in phi is not defined within the Kernel itself.
- if (MRI->getVRegDef(AntiReg)->getParent() != MBB) {
- LLVM_DEBUG(dbgs() << "Special phi structure is not supported!\n");
- return false;
- }
for (auto Def : PhiDefs)
if (MI.readsRegister(Def, TRI)) {
LLVM_DEBUG(
@@ -539,9 +533,12 @@ void WindowScheduler::schedulePhi(int Offset, unsigned &II) {
// The anti-dependency of phi need to be handled separately in the same way.
if (Register AntiReg = getAntiRegister(&Phi)) {
auto *AntiMI = MRI->getVRegDef(AntiReg);
- auto AntiCycle = getOriCycle(AntiMI);
- if (getOriStage(getOriMI(AntiMI), Offset) == 0)
- LateCycle = std::min(LateCycle, AntiCycle);
+ // AntiReg may be defined outside the kernel MBB.
+ if (AntiMI->getParent() == MBB) {
+ auto AntiCycle = getOriCycle(AntiMI);
+ if (getOriStage(getOriMI(AntiMI), Offset) == 0)
+ LateCycle = std::min(LateCycle, AntiCycle);
+ }
}
// If there is no limit to the late cycle, a default value is given.
if (LateCycle == INT_MAX)
diff --git a/llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir b/llvm/test/CodeGen/Hexagon/swp-ws-phi.mir
similarity index 95%
rename from llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir
rename to llvm/test/CodeGen/Hexagon/swp-ws-phi.mir
index c6da660b87cce..7897a02b43f38 100644
--- a/llvm/test/CodeGen/Hexagon/swp-ws-fail-3.mir
+++ b/llvm/test/CodeGen/Hexagon/swp-ws-phi.mir
@@ -2,7 +2,7 @@
# RUN: llc --march=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \
# RUN: -window-sched=force -filetype=null 2>&1 | FileCheck %s
-# CHECK: Special phi structure is not supported!
+# CHECK: Window scheduling is not needed!
# CHECK-LABEL: body: |
# CHECK: bb.0:
# CHECK: [[REG:%[0-9]+]]:intregs = A2_tfrsi 0
@@ -39,6 +39,3 @@ body: |
J2_jump %bb.1, implicit-def $pc
...
-
-
-
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