[llvm] [RISCV] Relax RISCVInsertVSETVLI output VL peeking to cover registers (PR #96200)

[Luke Lau via llvm-commits]

lukel97 wrote:

> Seem LLVM :: Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution.ll also need update?

Whoops yes, should be updated now

https://github.com/llvm/llvm-project/pull/96200