[llvm] 457e895 - [CodeGen] Do not include $noreg in any regmask operands. NFCI. (#95775)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 17 05:42:06 PDT 2024
Author: Jay Foad
Date: 2024-06-17T13:42:03+01:00
New Revision: 457e8954798b707c73ec76e0819760aaf65d0ffb
URL: https://github.com/llvm/llvm-project/commit/457e8954798b707c73ec76e0819760aaf65d0ffb
DIFF: https://github.com/llvm/llvm-project/commit/457e8954798b707c73ec76e0819760aaf65d0ffb.diff
LOG: [CodeGen] Do not include $noreg in any regmask operands. NFCI. (#95775)
Saying that a call preserves $noreg seems weird and required a
workaround in MachineLICM.
Added:
Modified:
llvm/lib/CodeGen/MachineLICM.cpp
llvm/lib/CodeGen/RegUsageInfoCollector.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index 1c76d72ed5152..d81fe54fe844c 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -440,8 +440,7 @@ static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
break;
// Check if we have a valid PhysReg that is set in the mask.
- // FIXME: We shouldn't have to check for PhysReg.
- if (PhysReg && ((Word >> Bit) & 1)) {
+ if ((Word >> Bit) & 1) {
for (MCRegUnitIterator RUI(PhysReg, &TRI); RUI.isValid(); ++RUI)
ClobberedRUs.reset(*RUI);
}
diff --git a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
index 6657cf3c1ef4a..ca5e0b428c477 100644
--- a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
+++ b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
@@ -142,6 +142,9 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
RegMask[Reg / 32] &= ~(1u << Reg % 32);
};
+ // Don't include $noreg in any regmasks.
+ SetRegAsDefined(MCRegister::NoRegister);
+
// Some targets can clobber registers "inside" a call, typically in
// linker-generated code.
for (const MCPhysReg Reg : TRI->getIntraCallClobberedRegs(&MF))
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