[llvm] d4bfc4a - [RISCV][NFC] Cleanup SCR1 sched model (#96088)

[via llvm-commits]

Author: Anton Sidorenko
Date: 2024-06-20T18:14:09+03:00
New Revision: d4bfc4a821dfcb1bc2445dc21c30eacdb7b90197

URL: https://github.com/llvm/llvm-project/commit/d4bfc4a821dfcb1bc2445dc21c30eacdb7b90197
DIFF: https://github.com/llvm/llvm-project/commit/d4bfc4a821dfcb1bc2445dc21c30eacdb7b90197.diff

LOG: [RISCV][NFC] Cleanup SCR1 sched model (#96088)

Related to https://github.com/llvm/llvm-project/pull/95948

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td b/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
index 84417c11abe5e..dc20fdcea4d78 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
@@ -101,8 +101,6 @@ def : ReadAdvance<ReadIRem, 0>;
 def : ReadAdvance<ReadIRem32, 0>;
 def : ReadAdvance<ReadIMul, 0>;
 def : ReadAdvance<ReadIMul32, 0>;
-def : ReadAdvance<ReadSFBJmp, 0>;
-def : ReadAdvance<ReadSFBALU, 0>;
 
 //===----------------------------------------------------------------------===//
 // Unsupported extensions