[llvm] [StackMaps] Check both subregs and superregs for getDwarfRegNum (PR #95837)

[Chen Zheng via llvm-commits]

================
@@ -191,14 +191,22 @@ unsigned StackMaps::getNextMetaArgIdx(const MachineInstr *MI, unsigned CurIdx) {
   return CurIdx;
 }
 
-/// Go up the super-register chain until we hit a valid dwarf register number.
+/// Go up the super-register and sub-register chain until we hit a valid dwarf
+/// register number.
 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
   int RegNum;
   for (MCPhysReg SR : TRI->superregs_inclusive(Reg)) {
     RegNum = TRI->getDwarfRegNum(SR, false);
     if (RegNum >= 0)
       break;
   }
+  if (RegNum < 0) {
----------------
chenzheng1030 wrote:

I think for this issue, adding `DwarfRegAlias` should be enough to solve the missing DWARF number assertion for PPC pair vsr registers.

Maybe we can get a more general solution here. This is a static `getDwarfRegNum()` in `StackMap.cpp`. There is another implementation for `getDwarfRegNum()` in `MCRegisterInfo.h`.
- We should try to replace this static implementation with the one in `MCRegisterInfo.h`?
- Do we really need the `DwarfRegAlias` in td files? For the current implementation of `getDwarfRegNum()` in `MCRegisterInfo.h`, yes, we need `DwarfRegAlias`. But if we change its implementation to also check the sub/super registers, I don't think we still need them. The implementation seems make sense at least on PPC. For PPC registers, if registers overlap physically, they will share same DWARF register number.  (For now, most usages of `DwarfRegAlias` are for super/sub registers, several usages should be able to replace with DwarfRegNum, or register `Aliases`). For example:

PPC:
```
// The representation of r0 when treated as the constant 0.
let isConstant = true in {
def ZERO  : GPR<0, "0">,    DwarfRegAlias<R0>; 
def ZERO8 : GP8<ZERO, "0">, DwarfRegAlias<X0>;
} // isConstant = true
```
Can be replaced with:
```
// The representation of r0 when treated as the constant 0.
let isConstant = true in {
def ZERO  : GPR<0, "0"> {
  let Aliases = [R0]
} 
def ZERO8 : GP8<ZERO, "0"> {
  let Aliases = [X0]
}
} // isConstant = true
```

AArch64:
```
let isConstant = true in
def WZR   : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;  //can be replaced with DwarfRegNum, can it be replaced with register Aliases?
```

One thing is, the register with DWARF number in td files may not be the direct super/sub register of the register we want to get the DWARF number for.

@arsenm @efriedma-quic any thoughts for this proposal?

https://github.com/llvm/llvm-project/pull/95837