[llvm] [RISCV] Mark all registers marked isConstant as reserved (PR #96002)

Francis Visoiu Mistrih via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 20 01:56:30 PDT 2024


https://github.com/francisvm updated https://github.com/llvm/llvm-project/pull/96002

>From ad2bb1b3ccfe3d318285c9dc9c2a6d784e1aa468 Mon Sep 17 00:00:00 2001
From: Francis Visoiu Mistrih <francisvm at apple.com>
Date: Tue, 18 Jun 2024 15:26:09 -0700
Subject: [PATCH] [RISCV] Mark all registers marked isConstant as reserved

This makes use of the information from TableGen instead of duplicating
it in the code.
---
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index caa5dbc15f8bd..23bed42276ce4 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -104,14 +104,18 @@ BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   auto &Subtarget = MF.getSubtarget<RISCVSubtarget>();
 
-  // Mark any registers requested to be reserved as such
-  for (size_t Reg = 0; Reg < getNumRegs(); Reg++) {
-    if (Subtarget.isRegisterReservedByUser(Reg))
+  for (Register Reg = RISCV::NoRegister; Reg < RISCV::NUM_TARGET_REGS; Reg++) {
+    // Mark any GPRs requested to be reserved as such
+    if (Reg >= RISCV::X0 && Reg <= RISCV::X31 &&
+        Subtarget.isRegisterReservedByUser(Reg))
+      markSuperRegs(Reserved, Reg);
+
+    // Mark all the registers defined as constant in TableGen as reserved.
+    if (isConstantPhysReg(Reg))
       markSuperRegs(Reserved, Reg);
   }
 
   // Use markSuperRegs to ensure any register aliases are also reserved
-  markSuperRegs(Reserved, RISCV::X0); // zero
   markSuperRegs(Reserved, RISCV::X2); // sp
   markSuperRegs(Reserved, RISCV::X3); // gp
   markSuperRegs(Reserved, RISCV::X4); // tp
@@ -136,7 +140,6 @@ BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   markSuperRegs(Reserved, RISCV::VTYPE);
   markSuperRegs(Reserved, RISCV::VXSAT);
   markSuperRegs(Reserved, RISCV::VXRM);
-  markSuperRegs(Reserved, RISCV::VLENB); // vlenb (constant)
 
   // Floating point environment registers.
   markSuperRegs(Reserved, RISCV::FRM);



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