[llvm] [DAG] expandAVG - attempt to extend to a wider integer type for the add/shift to avoid overflow handling (PR #95788)

[Simon Pilgrim via llvm-commits]

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@@ -167,11 +151,11 @@ define i32 @test_ext_i32(i32 %a0, i32 %a1) nounwind {
 ;
 ; X64-LABEL: test_ext_i32:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    andl %esi, %eax
-; X64-NEXT:    xorl %esi, %edi
-; X64-NEXT:    sarl %edi
-; X64-NEXT:    addl %edi, %eax
+; X64-NEXT:    movslq %esi, %rcx
+; X64-NEXT:    movslq %edi, %rax
+; X64-NEXT:    addq %rcx, %rax
+; X64-NEXT:    shrq %rax
+; X64-NEXT:    # kill: def $eax killed $eax killed $rax
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RKSimon wrote:

Yes that scared me as well at first :) We have excess sign bits (32 from i32->i64 sext then add) , and we're truncating the result back to i32, so SimplifyDemandedBits replaces the i64 sra with i64 srl.

https://github.com/llvm/llvm-project/pull/95788