[llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)

[Matt Arsenault via llvm-commits]

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@@ -3745,6 +3745,21 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     if (!DstBank)
       DstBank = SrcBank;
 
+    // The calling convention is to be updated such that i1 function arguments
+    // or return values are assigned to SGPRs without promoting to i32. With
+    // this, for i1 function arguments, the call of getRegBank() above gives
+    // incorrect result. We set both src and dst banks to VCCRegBank.
+    if (!MI.getOperand(1).getReg().isVirtual() &&
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arsenm wrote:

Shouldn't directly depend on isVirtual / isPhysical. You should be relying on the bank retrieved above which should be correct 

https://github.com/llvm/llvm-project/pull/96155