[llvm] [AMDGPU] Add IsSingle to V_DIV_FMAS* for consistency. (PR #95983)

via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 18 13:22:47 PDT 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Joe Nash (Sisyph)

<details>
<summary>Changes</summary>

A _e64 suffix should not be printed since these instructions only have one legal encoding length. The absence of the IsSingle flag is hidden by how the string is printed, but fix it for consistency.
NFC

---
Full diff: https://github.com/llvm/llvm-project/pull/95983.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.td (+2) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index 3d93764bd7ca1..0f9e79bc13953 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -13,9 +13,11 @@ def VOP_F32_F32_F32_F32_VCC : VOPProfile<[f32, f32, f32, f32]> {
   let Outs64 = (outs DstRC.RegClass:$vdst);
   let HasExtVOP3DPP = 0;
   let HasExtDPP = 0;
+  let IsSingle = 1;
 }
 def VOP_F64_F64_F64_F64_VCC : VOPProfile<[f64, f64, f64, f64]> {
   let Outs64 = (outs DstRC.RegClass:$vdst);
+  let IsSingle = 1;
 }
 }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/95983


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