[llvm] [RegAllocFast] Handle single-vdef instrs faster (PR #96284)
Alexis Engelke via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 21 01:35:39 PDT 2024
================
@@ -1306,14 +1302,27 @@ void RegAllocFastImpl::findAndSortDefOperandIndexes(const MachineInstr &MI) {
}
}
- if (MO.isDef()) {
- if (Reg.isVirtual() && shouldAllocateRegister(Reg))
- DefOperandIndexes.push_back(I);
-
- addRegClassDefCounts(RegClassDefCounts, Reg);
- }
+ if (MO.isDef() && Reg.isVirtual() && shouldAllocateRegister(Reg))
+ DefOperandIndexes.push_back(I);
}
+ // Most instructions only have one virtual def, so there's no point in
+ // computing the possible number of defs for every register class.
+ if (DefOperandIndexes.size() <= 1)
+ return;
+
+ // Track number of defs which may consume a register from the class. This is
+ // used to assign registers for possibly-too-small classes first. Example:
+ // defs are eax, 3 * gr32_abcd, 2 * gr32 => we want to assign the gr32_abcd
+ // registers first so that the gr32 don't use the gr32_abcd registers before
+ // we assign these.
+ std::vector<unsigned> RegClassDefCounts(TRI->getNumRegClasses(), 0);
----------------
aengelke wrote:
Using SmallVector now and replaced operand index uint16_t with unsigned. Changing the type of NumOperands seems like a very invasive refactoring and should probably be done spearately?
https://github.com/llvm/llvm-project/pull/96284
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