[llvm] [RISCV][NFC] Cleanup SCR1 sched model (PR #96088)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 19 09:23:49 PDT 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Anton Sidorenko (asi-sc)

<details>
<summary>Changes</summary>

Related to https://github.com/llvm/llvm-project/pull/95948

---
Full diff: https://github.com/llvm/llvm-project/pull/96088.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td (-2) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td b/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
index 84417c11abe5e..dc20fdcea4d78 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
@@ -101,8 +101,6 @@ def : ReadAdvance<ReadIRem, 0>;
 def : ReadAdvance<ReadIRem32, 0>;
 def : ReadAdvance<ReadIMul, 0>;
 def : ReadAdvance<ReadIMul32, 0>;
-def : ReadAdvance<ReadSFBJmp, 0>;
-def : ReadAdvance<ReadSFBALU, 0>;
 
 //===----------------------------------------------------------------------===//
 // Unsupported extensions

``````````

</details>


https://github.com/llvm/llvm-project/pull/96088


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