[lld] [llvm] [LLD][COFF] Add support for ARM64EC entry thunks. (PR #88132)
Martin Storsjö via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 17 02:48:49 PDT 2024
================
@@ -0,0 +1,345 @@
+// REQUIRES: aarch64
+// RUN: split-file %s %t.dir && cd %t.dir
+
+#--- test-simple.s
+// Build a simple function with an entry thunk.
+
+ .section .text,"xr",discard,func
+ .globl func
+ .p2align 2
+func:
+ mov w0, #1
+ ret
+
+ .section .wowthk$aa,"xr",discard,thunk
+ .globl thunk
+ .p2align 2
+thunk:
+ mov w0, #10
+ ret
+
+ .section .hybmp$x, "yi"
+ .symidx func
+ .symidx thunk
+ .word 1
+
+ .data
+ .rva func
+
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows %S/Inputs/loadconfig-arm64ec.s -o loadcfg.obj
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test-simple.s -o test-simple.obj
+// RUN: lld-link -machine:arm64ec -dll -noentry -out:out-simple.dll loadcfg.obj test-simple.obj
+// RUN: llvm-objdump -d out-simple.dll | FileCheck --check-prefix=DISASM %s
+
+// DISASM: Disassembly of section .text:
+// DISASM-EMPTY:
+// DISASM-NEXT: 0000000180001000 <.text>:
+// DISASM-NEXT: 180001000: 00000009 udf #0x9
+// DISASM-NEXT: 180001004: 52800020 mov w0, #0x1 // =1
+// DISASM-NEXT: 180001008: d65f03c0 ret
+// DISASM-NEXT: 18000100c: 52800140 mov w0, #0xa // =10
+// DISASM-NEXT: 180001010: d65f03c0 ret
+
+// RUN: llvm-readobj --sections out-simple.dll | FileCheck --check-prefix=HYBMP %s
+// HYBMP-NOT: .hybmp
+
+// RUN: lld-link -machine:arm64x -dll -noentry -out:out-simplex.dll loadcfg.obj test-simple.obj
+// RUN: llvm-objdump -d out-simplex.dll | FileCheck --check-prefix=DISASM %s
+
+#--- test-split-func.s
+// Build a simple function with an entry thunk, but pass it in multiple files.
+
+ .section .text,"xr",discard,func
+ .globl func
+ .p2align 2
+func:
+ mov w0, #1
+ ret
+
+#--- test-split-thunk.s
+ .section .wowthk$aa,"xr",discard,thunk
+ .globl thunk
+ .p2align 2
+thunk:
+ mov w0, #10
+ ret
+
+#--- test-split-hybmp.s
+ .section .hybmp$x, "yi"
+ .symidx func
+ .symidx thunk
+ .word 1
+
+#--- test-split-data.s
+ .data
+ .rva func
+
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test-split-func.s -o test-split-func.obj
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test-split-thunk.s -o test-split-thunk.obj
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test-split-hybmp.s -o test-split-hybmp.obj
+// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test-split-data.s -o test-split-data.obj
+// RUN: lld-link -machine:arm64ec -dll -noentry -out:out-split.dll loadcfg.obj \
+// RUN: test-split-func.obj test-split-thunk.obj test-split-data.obj test-split-hybmp.obj
+// RUN: llvm-objdump -d out-split.dll | FileCheck --check-prefix=DISASM %s
+
+#--- test-align.s
+// Build multiple functions with thunks and various alignments and check that entry thunk offsets
+// are correctly placed.
----------------
mstorsjo wrote:
I don't see where the extra alignment actually is visible in the output - it seems like those cases end up perfectly aligned out of the box, so there's no padding visible anywhere in the disassembled text section?
https://github.com/llvm/llvm-project/pull/88132
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