[llvm] [Loads] Pass DominatorTree if available (PR #95752)
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Mon Jun 17 23:31:14 PDT 2024
https://github.com/ruiling updated https://github.com/llvm/llvm-project/pull/95752
>From 841fb4a476bdef4fe59fadef8447b598410947a9 Mon Sep 17 00:00:00 2001
From: Ruiling Song <ruiling.song at amd.com>
Date: Mon, 17 Jun 2024 15:36:06 +0800
Subject: [PATCH] [Loads] Pass DominatorTree if available
For better dominance check inside the function.
---
llvm/lib/Analysis/Loads.cpp | 2 +-
.../LICM/hoist-speculatable-load.ll | 63 +++++++++++++++++++
2 files changed, 64 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/Transforms/LICM/hoist-speculatable-load.ll
diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp
index 478302d687b53..2b8197066e8e9 100644
--- a/llvm/lib/Analysis/Loads.cpp
+++ b/llvm/lib/Analysis/Loads.cpp
@@ -165,7 +165,7 @@ static bool isDereferenceableAndAlignedPointer(
if (getKnowledgeForValue(
V, {Attribute::Dereferenceable, Attribute::Alignment}, AC,
[&](RetainedKnowledge RK, Instruction *Assume, auto) {
- if (!isValidAssumeForContext(Assume, CtxI))
+ if (!isValidAssumeForContext(Assume, CtxI, DT))
return false;
if (RK.AttrKind == Attribute::Alignment)
AlignRK = std::max(AlignRK, RK);
diff --git a/llvm/test/Transforms/LICM/hoist-speculatable-load.ll b/llvm/test/Transforms/LICM/hoist-speculatable-load.ll
new file mode 100644
index 0000000000000..307a93b40ca8b
--- /dev/null
+++ b/llvm/test/Transforms/LICM/hoist-speculatable-load.ll
@@ -0,0 +1,63 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=licm -S < %s | FileCheck %s
+
+define dso_local void @f(i32 %ptr_i, ptr %ptr2, i32 %n, i32 %n2) {
+; CHECK-LABEL: @f(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[N:%.*]]
+; CHECK-NEXT: [[PTR:%.*]] = inttoptr i32 [[PTR_I:%.*]] to ptr
+; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[PTR]], i32 16), "dereferenceable"(ptr [[PTR]], i32 16) ]
+; CHECK-NEXT: br i1 [[CMP7]], label [[FOR_BODY_LR_PH:%.*]], label [[IF0:%.*]]
+; CHECK: if0:
+; CHECK-NEXT: store i32 0, ptr [[PTR2:%.*]], align 4
+; CHECK-NEXT: br label [[FOR_BODY_LR_PH]]
+; CHECK: for.body.lr.ph:
+; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[N2:%.*]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR]], align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END:%.*]] ]
+; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[IF_END]], label [[IF:%.*]]
+; CHECK: if:
+; CHECK-NEXT: store i32 [[TMP0]], ptr [[PTR2]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[N]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp7 = icmp slt i32 0, %n
+ %ptr = inttoptr i32 %ptr_i to ptr
+ call void @llvm.assume(i1 true) [ "align"(ptr %ptr, i32 16), "dereferenceable"(ptr %ptr, i32 16) ]
+ br i1 %cmp7, label %for.body.lr.ph, label %if0
+
+if0:
+ store i32 0, ptr %ptr2, align 4
+ br label %for.body.lr.ph
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %if.end
+ %i.08 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end ]
+ %tobool.not = icmp eq i32 %n2, 0
+ br i1 %tobool.not, label %if.end, label %if
+
+if:
+ %0 = load i32, ptr %ptr, align 4, !invariant.load !{}
+ store i32 %0, ptr %ptr2, align 4
+ br label %if.end
+
+if.end: ; preds = %for.body
+ %inc = add nuw nsw i32 %i.08, 1
+ %cmp = icmp slt i32 %inc, %n
+ br i1 %cmp, label %for.body, label %exit
+
+exit: ; preds = %if.end, %entry
+ ret void
+}
+
+declare void @llvm.assume(i1 noundef)
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