[llvm] [AMDGPU] Add IsSingle to a few Interp instructions (PR #95984)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Joe Nash (Sisyph)

<details>
<summary>Changes</summary>

A _e64 suffix should not be printed since these instructions only have one legal encoding length. The absence of the IsSingle flag is hidden by how the string is printed. We could fix it for GFX10 as well, but we shouldn't change the asm output to omit _e64 at this point.
NFC.

---
Full diff: https://github.com/llvm/llvm-project/pull/95984.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.td (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index 3d93764bd7ca1..8f9a9af5374a4 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -105,7 +105,7 @@ class getInterp16Ins <bit HasSrc2, bit HasOMod,
 }
 
 class VOP3_INTERP16 <list<ValueType> ArgVT> : VOPProfile<ArgVT> {
-
+  let IsSingle = 1;
   let HasOMod = !ne(DstVT.Value, f16.Value);
   let HasHigh = 1;
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/95984