[llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)
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llvm-commits at lists.llvm.org
Sun Jun 23 03:15:25 PDT 2024
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@@ -890,6 +895,9 @@ void VPlan::execute(VPTransformState *State) {
// Move the last step to the end of the latch block. This ensures
// consistent placement of all induction updates.
Instruction *Inc = cast<Instruction>(Phi->getIncomingValue(1));
+ if (isa<VPWidenIntOrFpInductionRecipe>(&R) && R.getNumOperands() == 4)
+ Inc->setOperand(0, State->get(R.getOperand(3), 0));
+
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ayalz wrote:
Good to add some explanation why Inc's first operand is set to R's last operand (if it has four).
Better to place this after `Inc->moveBefore()` below or before `//Move the last` explanation above.
BTW, above setting of Phi also suffers from WidenPointer recipe producing both a phi and a gep.
https://github.com/llvm/llvm-project/pull/95842
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