[llvm] [LoopVectorize][AArch64] Add limited support for scalable vectorisation of i1 types (PR #95920)

[Paul Walker via llvm-commits]

https://github.com/paulwalker-arm commented:

In general the patch looks good to me but we do support, and generate (see sve-extract-vector-to-predicate-store.ll), normal loads and stores of `<vscale x 16 x i1>` types.  Do you know what the cost model originally reported for these?

 If they already return an invalid cost then this patch makes nothing worse and so you're good to go. However, if that's not the case then `AArch64TTIImpl::getMemoryOpCost` should be updated to allow for that one predicate type.

https://github.com/llvm/llvm-project/pull/95920