[llvm] [MachineLICM] Correctly Apply Register Masks (PR #95746)

[Jay Foad via llvm-commits]

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@@ -438,21 +436,15 @@ static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
       if (PhysReg == NumRegs)
         break;
 
-      if (!PhysReg)
-        continue;
-
-      // Extract the bit and apply it to the appropriate mask.
-      auto &Mask = ((Word >> Bit) & 1) ? RUsInMask : RUsNotInMask;
-      for (MCRegUnitIterator RUI(PhysReg, &TRI); RUI.isValid(); ++RUI)
-        Mask.set(*RUI);
+      // Check if we have a valid PhysReg that is set in the mask.
+      if (PhysReg && ((Word >> Bit) & 1)) {
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jayfoad wrote:

I don't think the check for `PhysReg` should be required, since bit 0 should never be set in the input `Mask` in the first place, but I did see one crash when I tried removing it. Maybe add a FIXME?

https://github.com/llvm/llvm-project/pull/95746