[llvm] [RISCV][PoC] Schedule RVV instructions with same type first (PR #95924)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 18 06:52:34 PDT 2024
================
@@ -0,0 +1,83 @@
+//===- RISCVMachineScheduler.cpp - MI Scheduler for RISC-V ----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "RISCVMachineScheduler.h"
+#include "MCTargetDesc/RISCVBaseInfo.h"
+#include "MCTargetDesc/RISCVMCTargetDesc.h"
+#include "RISCVInstrInfo.h"
+#include "RISCVSubtarget.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachineScheduler.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/TargetParser/RISCVTargetParser.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "riscv-prera-sched-strategy"
+
+static cl::opt<bool> EnableScheduleSameVType(
+ "riscv-enable-schedule-same-vtype", cl::init(false), cl::Hidden,
+ cl::desc("Enable scheduling RVV instructions with same vtype first"));
+
+SUnit *RISCVPreRAMachineSchedStrategy::pickNode(bool &IsTopNode) {
----------------
michaelmaitland wrote:
This function currently assumes that we are doing bottom up scheduling, but should really be checking `RegionPolicy.OnlyTopDown` and `RegionPolicy.OnlyBottomUp`
https://github.com/llvm/llvm-project/pull/95924
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