[llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)
Roger Ferrer Ibáñez via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 17 02:51:13 PDT 2024
https://github.com/rofirrim updated https://github.com/llvm/llvm-project/pull/93481
>From 01673ae4aff9bb2b12fc776418c694959a565644 Mon Sep 17 00:00:00 2001
From: Roger Ferrer Ibanez <roger.ferrer at bsc.es>
Date: Thu, 30 May 2024 13:12:45 +0000
Subject: [PATCH 1/4] [RISCV] Custom lower llvm.clear_cache on glibc targets
Typically __clear_cache is used but on these targets __riscv_flush_icache
is used instead. Because it also has a different signature we need
custom lowering.
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 46 +++++++++++++++++++
llvm/lib/Target/RISCV/RISCVISelLowering.h | 3 ++
llvm/test/CodeGen/RISCV/clear-cache.ll | 49 +++++++++++++++++++++
3 files changed, 98 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/clear-cache.ll
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index af3950773e4d0..a99ccfb23183b 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -662,6 +662,11 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setBooleanContents(ZeroOrOneBooleanContent);
+ if (Subtarget.getTargetTriple().isOSGlibc()) {
+ // Custom lowering of llvm.clear_cache.
+ setOperationAction(ISD::CLEAR_CACHE, MVT::Other, Custom);
+ }
+
if (Subtarget.hasVInstructions()) {
setBooleanVectorContents(ZeroOrOneBooleanContent);
@@ -7152,7 +7157,48 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
return lowerVPSpliceExperimental(Op, DAG);
case ISD::EXPERIMENTAL_VP_REVERSE:
return lowerVPReverseExperimental(Op, DAG);
+ case ISD::CLEAR_CACHE: {
+ assert(Subtarget.getTargetTriple().isOSGlibc() &&
+ "llvm.clear_cache only needs custom lower on glibc targets");
+ SDLoc DL(Op);
+ SDValue Flags = DAG.getConstant(0, DL, Subtarget.getXLenVT());
+ return emitFlushICache(DAG, Op.getOperand(0), Op.getOperand(1),
+ Op.getOperand(2), Flags, DL);
}
+ }
+}
+
+SDValue RISCVTargetLowering::emitFlushICache(SelectionDAG &DAG, SDValue InChain,
+ SDValue Start, SDValue End,
+ SDValue Flags, SDLoc DL) const {
+ TargetLowering::ArgListTy Args;
+ TargetLowering::ArgListEntry Entry;
+
+ // start
+ Entry.Node = Start;
+ Entry.Ty = PointerType::getUnqual(*DAG.getContext());
+ Args.push_back(Entry);
+
+ // end
+ Entry.Node = End;
+ Entry.Ty = PointerType::getUnqual(*DAG.getContext());
+ Args.push_back(Entry);
+
+ // flags
+ Entry.Node = Flags;
+ Entry.Ty = Type::getIntNTy(*DAG.getContext(), Subtarget.getXLen());
+ Args.push_back(Entry);
+
+ TargetLowering::CallLoweringInfo CLI(DAG);
+ EVT Ty = getPointerTy(DAG.getDataLayout());
+ CLI.setDebugLoc(DL).setChain(InChain).setLibCallee(
+ CallingConv::C, Type::getVoidTy(*DAG.getContext()),
+ DAG.getExternalSymbol("__riscv_flush_icache", Ty), std::move(Args));
+
+ std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
+
+ // This function returns void so only the out chain matters.
+ return CallResult.second;
}
static SDValue getTargetNode(GlobalAddressSDNode *N, const SDLoc &DL, EVT Ty,
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index 3b8eb3c88901a..7d8bceb5cb341 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -1037,6 +1037,9 @@ class RISCVTargetLowering : public TargetLowering {
const APInt &AndMask) const override;
unsigned getMinimumJumpTableEntries() const override;
+
+ SDValue emitFlushICache(SelectionDAG &DAG, SDValue InChain, SDValue Start,
+ SDValue End, SDValue Flags, SDLoc DL) const;
};
/// As per the spec, the rules for passing vector arguments are as follows:
diff --git a/llvm/test/CodeGen/RISCV/clear-cache.ll b/llvm/test/CodeGen/RISCV/clear-cache.ll
new file mode 100644
index 0000000000000..84db1eb0d3bda
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/clear-cache.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=riscv32 < %s | FileCheck --check-prefix=RV32 %s
+; RUN: llc -mtriple=riscv64 < %s | FileCheck --check-prefix=RV64 %s
+; RUN: llc -mtriple=riscv32-unknown-linux-gnu < %s | FileCheck --check-prefix=RV32-GLIBC %s
+; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck --check-prefix=RV64-GLIBC %s
+
+declare void @llvm.clear_cache(ptr, ptr)
+
+define void @foo(ptr %a, ptr %b) nounwind {
+; RV32-LABEL: foo:
+; RV32: # %bb.0:
+; RV32-NEXT: addi sp, sp, -16
+; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32-NEXT: call __clear_cache
+; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32-NEXT: addi sp, sp, 16
+; RV32-NEXT: ret
+;
+; RV64-LABEL: foo:
+; RV64: # %bb.0:
+; RV64-NEXT: addi sp, sp, -16
+; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64-NEXT: call __clear_cache
+; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64-NEXT: addi sp, sp, 16
+; RV64-NEXT: ret
+;
+; RV32-GLIBC-LABEL: foo:
+; RV32-GLIBC: # %bb.0:
+; RV32-GLIBC-NEXT: addi sp, sp, -16
+; RV32-GLIBC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32-GLIBC-NEXT: li a2, 0
+; RV32-GLIBC-NEXT: call __riscv_flush_icache
+; RV32-GLIBC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32-GLIBC-NEXT: addi sp, sp, 16
+; RV32-GLIBC-NEXT: ret
+;
+; RV64-GLIBC-LABEL: foo:
+; RV64-GLIBC: # %bb.0:
+; RV64-GLIBC-NEXT: addi sp, sp, -16
+; RV64-GLIBC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64-GLIBC-NEXT: li a2, 0
+; RV64-GLIBC-NEXT: call __riscv_flush_icache
+; RV64-GLIBC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64-GLIBC-NEXT: addi sp, sp, 16
+; RV64-GLIBC-NEXT: ret
+ call void @llvm.clear_cache(ptr %a, ptr %b)
+ ret void
+}
>From 6f5598b756ec3141e982ecf520050050080483ce Mon Sep 17 00:00:00 2001
From: Roger Ferrer Ibanez <roger.ferrer at bsc.es>
Date: Fri, 31 May 2024 16:32:23 +0000
Subject: [PATCH 2/4] Get the TargetTriple directly from the TargetMachine
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a99ccfb23183b..228d1e5192c85 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -662,7 +662,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setBooleanContents(ZeroOrOneBooleanContent);
- if (Subtarget.getTargetTriple().isOSGlibc()) {
+ if (getTargetMachine().getTargetTriple().isOSGlibc()) {
// Custom lowering of llvm.clear_cache.
setOperationAction(ISD::CLEAR_CACHE, MVT::Other, Custom);
}
@@ -7158,7 +7158,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
case ISD::EXPERIMENTAL_VP_REVERSE:
return lowerVPReverseExperimental(Op, DAG);
case ISD::CLEAR_CACHE: {
- assert(Subtarget.getTargetTriple().isOSGlibc() &&
+ assert(getTargetMachine().getTargetTriple().isOSGlibc() &&
"llvm.clear_cache only needs custom lower on glibc targets");
SDLoc DL(Op);
SDValue Flags = DAG.getConstant(0, DL, Subtarget.getXLenVT());
>From ceba0c18b269e418d85ecd9d12e9321dc1bedba9 Mon Sep 17 00:00:00 2001
From: Roger Ferrer Ibanez <roger.ferrer at bsc.es>
Date: Thu, 13 Jun 2024 06:30:44 +0000
Subject: [PATCH 3/4] Add a runtime call for __riscv_flush_icache
This allows us to make the code much simpler.
---
llvm/include/llvm/IR/RuntimeLibcalls.def | 1 +
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 29 +++------------------
2 files changed, 5 insertions(+), 25 deletions(-)
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.def b/llvm/include/llvm/IR/RuntimeLibcalls.def
index e900bcdbcdd04..d8eab80656c06 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.def
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.def
@@ -623,6 +623,7 @@ HANDLE_LIBCALL(RETURN_ADDRESS, nullptr)
// Clear cache
HANDLE_LIBCALL(CLEAR_CACHE, "__clear_cache")
+HANDLE_LIBCALL(RISCV_FLUSH_ICACHE, "__riscv_flush_icache")
HANDLE_LIBCALL(UNKNOWN_LIBCALL, nullptr)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 228d1e5192c85..d75deac6b21e5 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -7171,31 +7171,10 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
SDValue RISCVTargetLowering::emitFlushICache(SelectionDAG &DAG, SDValue InChain,
SDValue Start, SDValue End,
SDValue Flags, SDLoc DL) const {
- TargetLowering::ArgListTy Args;
- TargetLowering::ArgListEntry Entry;
-
- // start
- Entry.Node = Start;
- Entry.Ty = PointerType::getUnqual(*DAG.getContext());
- Args.push_back(Entry);
-
- // end
- Entry.Node = End;
- Entry.Ty = PointerType::getUnqual(*DAG.getContext());
- Args.push_back(Entry);
-
- // flags
- Entry.Node = Flags;
- Entry.Ty = Type::getIntNTy(*DAG.getContext(), Subtarget.getXLen());
- Args.push_back(Entry);
-
- TargetLowering::CallLoweringInfo CLI(DAG);
- EVT Ty = getPointerTy(DAG.getDataLayout());
- CLI.setDebugLoc(DL).setChain(InChain).setLibCallee(
- CallingConv::C, Type::getVoidTy(*DAG.getContext()),
- DAG.getExternalSymbol("__riscv_flush_icache", Ty), std::move(Args));
-
- std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
+ MakeLibCallOptions CallOptions;
+ std::pair<SDValue, SDValue> CallResult =
+ makeLibCall(DAG, RTLIB::RISCV_FLUSH_ICACHE, MVT::isVoid,
+ {Start, End, Flags}, CallOptions, DL, InChain);
// This function returns void so only the out chain matters.
return CallResult.second;
>From 0d896adc49f03123a7baf1ed26b8f8ecd47d9409 Mon Sep 17 00:00:00 2001
From: Roger Ferrer Ibanez <roger.ferrer at bsc.es>
Date: Mon, 17 Jun 2024 09:50:45 +0000
Subject: [PATCH 4/4] Gate lowering to Linux instead of Glibc
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 6 +--
llvm/test/CodeGen/RISCV/clear-cache.ll | 42 +++++++++++----------
2 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index d75deac6b21e5..d3a0a08f68a1b 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -662,7 +662,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setBooleanContents(ZeroOrOneBooleanContent);
- if (getTargetMachine().getTargetTriple().isOSGlibc()) {
+ if (getTargetMachine().getTargetTriple().isOSLinux()) {
// Custom lowering of llvm.clear_cache.
setOperationAction(ISD::CLEAR_CACHE, MVT::Other, Custom);
}
@@ -7158,8 +7158,8 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
case ISD::EXPERIMENTAL_VP_REVERSE:
return lowerVPReverseExperimental(Op, DAG);
case ISD::CLEAR_CACHE: {
- assert(getTargetMachine().getTargetTriple().isOSGlibc() &&
- "llvm.clear_cache only needs custom lower on glibc targets");
+ assert(getTargetMachine().getTargetTriple().isOSLinux() &&
+ "llvm.clear_cache only needs custom lower on Linux targets");
SDLoc DL(Op);
SDValue Flags = DAG.getConstant(0, DL, Subtarget.getXLenVT());
return emitFlushICache(DAG, Op.getOperand(0), Op.getOperand(1),
diff --git a/llvm/test/CodeGen/RISCV/clear-cache.ll b/llvm/test/CodeGen/RISCV/clear-cache.ll
index 84db1eb0d3bda..d598a98a330e9 100644
--- a/llvm/test/CodeGen/RISCV/clear-cache.ll
+++ b/llvm/test/CodeGen/RISCV/clear-cache.ll
@@ -1,8 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv32 < %s | FileCheck --check-prefix=RV32 %s
; RUN: llc -mtriple=riscv64 < %s | FileCheck --check-prefix=RV64 %s
-; RUN: llc -mtriple=riscv32-unknown-linux-gnu < %s | FileCheck --check-prefix=RV32-GLIBC %s
-; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck --check-prefix=RV64-GLIBC %s
+; RUN: llc -mtriple=riscv32-unknown-linux-gnu < %s | FileCheck --check-prefix=RV32-LINUX %s
+; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck --check-prefix=RV64-LINUX %s
+; RUN: llc -mtriple=riscv32-unknown-linux-musl < %s | FileCheck --check-prefix=RV32-LINUX %s
+; RUN: llc -mtriple=riscv64-unknown-linux-musl < %s | FileCheck --check-prefix=RV64-LINUX %s
declare void @llvm.clear_cache(ptr, ptr)
@@ -25,25 +27,25 @@ define void @foo(ptr %a, ptr %b) nounwind {
; RV64-NEXT: addi sp, sp, 16
; RV64-NEXT: ret
;
-; RV32-GLIBC-LABEL: foo:
-; RV32-GLIBC: # %bb.0:
-; RV32-GLIBC-NEXT: addi sp, sp, -16
-; RV32-GLIBC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32-GLIBC-NEXT: li a2, 0
-; RV32-GLIBC-NEXT: call __riscv_flush_icache
-; RV32-GLIBC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32-GLIBC-NEXT: addi sp, sp, 16
-; RV32-GLIBC-NEXT: ret
+; RV32-LINUX-LABEL: foo:
+; RV32-LINUX: # %bb.0:
+; RV32-LINUX-NEXT: addi sp, sp, -16
+; RV32-LINUX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32-LINUX-NEXT: li a2, 0
+; RV32-LINUX-NEXT: call __riscv_flush_icache
+; RV32-LINUX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32-LINUX-NEXT: addi sp, sp, 16
+; RV32-LINUX-NEXT: ret
;
-; RV64-GLIBC-LABEL: foo:
-; RV64-GLIBC: # %bb.0:
-; RV64-GLIBC-NEXT: addi sp, sp, -16
-; RV64-GLIBC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64-GLIBC-NEXT: li a2, 0
-; RV64-GLIBC-NEXT: call __riscv_flush_icache
-; RV64-GLIBC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64-GLIBC-NEXT: addi sp, sp, 16
-; RV64-GLIBC-NEXT: ret
+; RV64-LINUX-LABEL: foo:
+; RV64-LINUX: # %bb.0:
+; RV64-LINUX-NEXT: addi sp, sp, -16
+; RV64-LINUX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64-LINUX-NEXT: li a2, 0
+; RV64-LINUX-NEXT: call __riscv_flush_icache
+; RV64-LINUX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64-LINUX-NEXT: addi sp, sp, 16
+; RV64-LINUX-NEXT: ret
call void @llvm.clear_cache(ptr %a, ptr %b)
ret void
}
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