[llvm] ffc51b9 - [LV] Remove loads from null from pr73894.ll test.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2024-06-20T10:57:25+01:00
New Revision: ffc51b966e74b89092cd57909d8659756aae106a

URL: https://github.com/llvm/llvm-project/commit/ffc51b966e74b89092cd57909d8659756aae106a
DIFF: https://github.com/llvm/llvm-project/commit/ffc51b966e74b89092cd57909d8659756aae106a.diff

LOG: [LV] Remove loads from null from pr73894.ll test.

Load from null is UB, load from pointer arg instead.

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
index 34d5db4a40ddf..d86ddcd670c4a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
@@ -3,12 +3,11 @@
 
 target triple = "aarch64-unknown-linux-gnu"
 
-define i32 @pr70988() {
+define i32 @pr70988(ptr %src, i32 %n) {
 ; CHECK-LABEL: define i32 @pr70988(
 ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr null, align 4
-; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[TMP0]], 15
+; CHECK-NEXT:    [[TMP1:%.*]] = and i32 %n, 15
 ; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 1)
 ; CHECK-NEXT:    [[UMAX:%.*]] = zext i32 [[TMP2]] to i64
 ; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
@@ -28,7 +27,7 @@ define i32 @pr70988() {
 ; CHECK-NEXT:    br i1 [[ACTIVE_LANE_MASK]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
 ; CHECK:       pred.load.if:
 ; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 0
-; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr i32, ptr null, i64 [[TMP3]]
+; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr i32, ptr %src, i64 [[TMP3]]
 ; CHECK-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
 ; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 ; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE]]
@@ -38,7 +37,7 @@ define i32 @pr70988() {
 ; CHECK-NEXT:    br i1 [[ACTIVE_LANE_MASK2]], label [[PRED_LOAD_IF4:%.*]], label [[PRED_LOAD_CONTINUE5]]
 ; CHECK:       pred.load.if4:
 ; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 1
-; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr i32, ptr null, i64 [[TMP9]]
+; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr i32, ptr %src, i64 [[TMP9]]
 ; CHECK-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
 ; CHECK-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
 ; CHECK-NEXT:    br label [[PRED_LOAD_CONTINUE5]]
@@ -65,7 +64,7 @@ define i32 @pr70988() {
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[INDUC:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDUC_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[MAX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[TMP24:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i32, ptr null, i64 [[INDUC]]
+; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i32, ptr %src, i64 [[INDUC]]
 ; CHECK-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[GEP]], align 8
 ; CHECK-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
 ; CHECK-NEXT:    [[TMP24]] = tail call i32 @llvm.smax.i32(i32 [[TMP23]], i32 [[MAX]])
@@ -77,8 +76,7 @@ define i32 @pr70988() {
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
-  %0 = load i32, ptr null
-  %1 = and i32 %0, 15
+  %1 = and i32 %n, 15
   %2 = call i32 @llvm.umax.i32(i32 %1, i32 1)
   %umax = zext i32 %2 to i64
   br label %loop
@@ -86,7 +84,7 @@ entry:
 loop:
   %induc = phi i64 [ 0, %entry ], [ %induc.next, %loop ]
   %max = phi i32 [ 0, %entry ], [ %5, %loop ]
-  %gep = getelementptr i32, ptr null, i64 %induc
+  %gep = getelementptr i32, ptr %src, i64 %induc
   %3 = load ptr, ptr %gep
   %4 = load i32, ptr %3
   %5 = tail call i32 @llvm.smax.i32(i32 %4, i32 %max)